forked from OSchip/llvm-project
COFF: Do not align import thunks on 16-byte boundaries on x86.
Looks like MSVC linker aligns them only on x64. llvm-svn: 243194
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9435b3c298
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1c341a54de
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@ -248,7 +248,8 @@ void StringChunk::writeTo(uint8_t *Buf) {
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ImportThunkChunk::ImportThunkChunk(Defined *S) : ImpSymbol(S) {
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// Intel Optimization Manual says that all branch targets
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// should be 16-byte aligned. MSVC linker does this too.
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Align = 16;
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if (Config->MachineType == AMD64)
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Align = 16;
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}
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void ImportThunkChunk::getBaserels(std::vector<uint32_t> *Res) {
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@ -19,7 +19,7 @@ IMPORT-NEXT: BoundDelayImportTable: 0x0
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IMPORT-NEXT: UnloadDelayImportTable: 0x0
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IMPORT-NEXT: Import {
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IMPORT-NEXT: Symbol: ExitProcess (0)
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IMPORT-NEXT: Address: 0x40002036
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IMPORT-NEXT: Address: 0x40002029
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IMPORT-NEXT: }
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IMPORT-NEXT: Import {
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IMPORT-NEXT: Symbol: MessageBoxA (0)
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@ -46,44 +46,41 @@ BASEREL-NEXT: Address: 0x200C
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BASEREL-NEXT: }
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BASEREL-NEXT: Entry {
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BASEREL-NEXT: Type: HIGHLOW
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BASEREL-NEXT: Address: 0x2022
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BASEREL-NEXT: Address: 0x201F
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BASEREL-NEXT: }
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BASEREL-NEXT: Entry {
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BASEREL-NEXT: Type: HIGHLOW
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BASEREL-NEXT: Address: 0x2032
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BASEREL-NEXT: Address: 0x2025
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BASEREL-NEXT: }
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BASEREL-NEXT: Entry {
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BASEREL-NEXT: Type: HIGHLOW
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BASEREL-NEXT: Address: 0x2039
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BASEREL-NEXT: Address: 0x202C
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BASEREL-NEXT: }
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BASEREL-NEXT: Entry {
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BASEREL-NEXT: Type: HIGHLOW
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BASEREL-NEXT: Address: 0x203E
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BASEREL-NEXT: Address: 0x2031
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BASEREL-NEXT: }
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BASEREL-NEXT: Entry {
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BASEREL-NEXT: Type: HIGHLOW
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BASEREL-NEXT: Address: 0x204E
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BASEREL-NEXT: Address: 0x2041
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BASEREL-NEXT: }
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BASEREL-NEXT: Entry {
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BASEREL-NEXT: Type: HIGHLOW
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BASEREL-NEXT: Address: 0x2053
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BASEREL-NEXT: Address: 0x2046
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BASEREL-NEXT: }
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BASEREL-NEXT: ]
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DISASM: 2030: ff 25 28 10 00 40 jmpl *1073745960
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DISASM-NEXT: 2036: 51 pushl %ecx
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DISASM-NEXT: 2037: 52 pushl %edx
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DISASM-NEXT: 2038: 68 20 10 00 40 pushl $1073745952
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DISASM-NEXT: 203d: 68 00 30 00 40 pushl $1073754112
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DISASM-NEXT: 2042: e8 b9 ff ff ff calll -71 <_main@0>
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DISASM-NEXT: 2047: 5a popl %edx
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DISASM-NEXT: 2048: 59 popl %ecx
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DISASM-NEXT: 2049: ff e0 jmpl *%eax
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DISASM-NEXT: 204b: 51 pushl %ecx
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DISASM-NEXT: 204c: 52 pushl %edx
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DISASM-NEXT: 204d: 68 28 10 00 40 pushl $1073745960
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DISASM-NEXT: 2052: 68 00 30 00 40 pushl $1073754112
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DISASM-NEXT: 2057: e8 a4 ff ff ff calll -92 <_main@0>
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DISASM-NEXT: 205c: 5a popl %edx
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DISASM-NEXT: 205d: 59 popl %ecx
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DISASM-NEXT: 205e: ff e0 jmpl *%eax
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DISASM: 202b: 68 20 10 00 40 pushl $1073745952
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DISASM-NEXT: 2030: 68 00 30 00 40 pushl $1073754112
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DISASM-NEXT: 2035: e8 c6 ff ff ff calll -58 <_main@0>
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DISASM-NEXT: 203a: 5a popl %edx
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DISASM-NEXT: 203b: 59 popl %ecx
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DISASM-NEXT: 203c: ff e0 jmpl *%eax
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DISASM-NEXT: 203e: 51 pushl %ecx
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DISASM-NEXT: 203f: 52 pushl %edx
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DISASM-NEXT: 2040: 68 28 10 00 40 pushl $1073745960
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DISASM-NEXT: 2045: 68 00 30 00 40 pushl $1073754112
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DISASM-NEXT: 204a: e8 b1 ff ff ff calll -79 <_main@0>
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DISASM-NEXT: 204f: 5a popl %edx
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DISASM-NEXT: 2050: 59 popl %ecx
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DISASM-NEXT: 2051: ff e0 jmpl *%eax
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