forked from OSchip/llvm-project
[InstCombine] refactor fabs+fcmp fold; NFC
Also, remove/replace/minimize/enhance the tests for this fold. The code drops FMF, so it needs more tests and at least 1 fix. llvm-svn: 345734
This commit is contained in:
Sanjay Patel
parent
0f46e34f74
commit
1c254c6716
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@ -5288,6 +5288,46 @@ static Instruction *foldFCmpReciprocalAndZero(FCmpInst &I, Instruction *LHSI,
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return NewFCI;
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}
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/// Optimize fabs(X) compared with zero.
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static Instruction *foldFabsWithFcmpZero(FCmpInst &I) {
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Value *X;
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if (!match(I.getOperand(0), m_Intrinsic<Intrinsic::fabs>(m_Value(X))) ||
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!match(I.getOperand(1), m_PosZeroFP()))
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return nullptr;
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switch (I.getPredicate()) {
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case FCmpInst::FCMP_UGE:
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case FCmpInst::FCMP_OLT:
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// fabs(X) >= 0.0 --> true
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// fabs(X) < 0.0 --> false
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llvm_unreachable("fcmp should have simplified");
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case FCmpInst::FCMP_OGT:
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// fabs(X) > 0.0 --> X != 0.0
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return new FCmpInst(FCmpInst::FCMP_ONE, X, I.getOperand(1));
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case FCmpInst::FCMP_OLE:
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// fabs(X) <= 0.0 --> X == 0.0
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return new FCmpInst(FCmpInst::FCMP_OEQ, X, I.getOperand(1));
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case FCmpInst::FCMP_OGE:
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// fabs(X) >= 0.0 --> !isnan(X)
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assert(!I.hasNoNaNs() && "fcmp should have simplified");
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return new FCmpInst(FCmpInst::FCMP_ORD, X, I.getOperand(1));
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case FCmpInst::FCMP_OEQ:
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case FCmpInst::FCMP_UEQ:
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case FCmpInst::FCMP_ONE:
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case FCmpInst::FCMP_UNE:
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// fabs(X) == 0.0 --> X == 0.0
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// fabs(X) != 0.0 --> X != 0.0
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return new FCmpInst(I.getPredicate(), X, I.getOperand(1));
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default:
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return nullptr;
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}
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}
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Instruction *InstCombiner::visitFCmpInst(FCmpInst &I) {
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bool Changed = false;
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@ -5418,45 +5458,11 @@ Instruction *InstCombiner::visitFCmpInst(FCmpInst &I) {
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if (Instruction *Res = foldCmpLoadFromIndexedGlobal(GEP, GV, I))
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return Res;
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break;
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case Instruction::Call: {
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if (!RHSC->isNullValue())
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break;
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CallInst *CI = cast<CallInst>(LHSI);
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Intrinsic::ID IID = getIntrinsicForCallSite(CI, &TLI);
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if (IID != Intrinsic::fabs)
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break;
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// Various optimization for fabs compared with zero.
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switch (Pred) {
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default:
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break;
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case FCmpInst::FCMP_UGE:
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case FCmpInst::FCMP_OLT:
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// fabs(x) >= 0.0 --> true
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// fabs(x) < 0.0 --> false
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llvm_unreachable("fcmp should have simplified");
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// fabs(x) > 0 --> x != 0
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case FCmpInst::FCMP_OGT:
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return new FCmpInst(FCmpInst::FCMP_ONE, CI->getArgOperand(0), RHSC);
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// fabs(x) <= 0 --> x == 0
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case FCmpInst::FCMP_OLE:
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return new FCmpInst(FCmpInst::FCMP_OEQ, CI->getArgOperand(0), RHSC);
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// fabs(x) >= 0 --> !isnan(x)
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case FCmpInst::FCMP_OGE:
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assert(!I.hasNoNaNs() && "fcmp should have simplified");
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return new FCmpInst(FCmpInst::FCMP_ORD, CI->getArgOperand(0), RHSC);
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// fabs(x) == 0 --> x == 0
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// fabs(x) != 0 --> x != 0
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case FCmpInst::FCMP_OEQ:
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case FCmpInst::FCMP_UEQ:
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case FCmpInst::FCMP_ONE:
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case FCmpInst::FCMP_UNE:
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return new FCmpInst(Pred, CI->getArgOperand(0), RHSC);
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}
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}
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}
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case Instruction::Call:
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if (Instruction *X = foldFabsWithFcmpZero(I))
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return X;
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break;
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}
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}
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// fcmp pred (fneg x), (fneg y) -> fcmp swap(pred) x, y
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@ -1,7 +1,9 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -instcombine < %s | FileCheck %s
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declare double @llvm.fabs.f64(double) readnone
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declare half @llvm.fabs.f16(half)
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declare double @llvm.fabs.f64(double)
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declare <2 x float> @llvm.fabs.v2f32(<2 x float>)
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define i1 @test1(float %x, float %y) {
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; CHECK-LABEL: @test1(
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@ -133,194 +135,92 @@ define float @test8(float %x) {
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; Float comparison to zero shouldn't cast to double.
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}
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declare double @fabs(double) readnone
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define i32 @test9(double %a) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: ret i32 0
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define i1 @fabs_uge(double %a) {
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; CHECK-LABEL: @fabs_uge(
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; CHECK-NEXT: ret i1 true
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp olt double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call double @llvm.fabs.f64(double %a)
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%cmp = fcmp uge double %call, 0.0
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ret i1 %cmp
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}
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define i32 @test9_intrinsic(double %a) {
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; CHECK-LABEL: @test9_intrinsic(
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; CHECK-NEXT: ret i32 0
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define i1 @fabs_olt(half %a) {
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; CHECK-LABEL: @fabs_olt(
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; CHECK-NEXT: ret i1 false
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp olt double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call half @llvm.fabs.f16(half %a)
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%cmp = fcmp olt half %call, 0.0
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ret i1 %cmp
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}
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define i32 @test10(double %a) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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define <2 x i1> @fabs_ole(<2 x float> %a) {
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; CHECK-LABEL: @fabs_ole(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <2 x float> [[A:%.*]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp ole double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
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%cmp = fcmp ole <2 x float> %call, zeroinitializer
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ret <2 x i1> %cmp
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}
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define i32 @test10_intrinsic(double %a) {
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; CHECK-LABEL: @test10_intrinsic(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp ole double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test11(double %a) {
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; CHECK-LABEL: @test11(
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define i1 @fabs_ogt(double %a) {
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; CHECK-LABEL: @fabs_ogt(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp ogt double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call double @llvm.fabs.f64(double %a)
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%cmp = fcmp ogt double %call, 0.0
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ret i1 %cmp
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}
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define i32 @test11_intrinsic(double %a) {
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; CHECK-LABEL: @test11_intrinsic(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp ogt double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test12(double %a) {
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; CHECK-LABEL: @test12(
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define i1 @fabs_oge(double %a) {
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; CHECK-LABEL: @fabs_oge(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp oge double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call double @llvm.fabs.f64(double %a)
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%cmp = fcmp oge double %call, 0.0
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ret i1 %cmp
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}
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define i32 @test12_intrinsic(double %a) {
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; CHECK-LABEL: @test12_intrinsic(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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define i1 @fabs_une(half %a) {
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; CHECK-LABEL: @fabs_une(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp une half [[A:%.*]], 0xH0000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp oge double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call half @llvm.fabs.f16(half %a)
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%cmp = fcmp une half %call, 0.0
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ret i1 %cmp
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}
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define i32 @test13(double %a) {
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; CHECK-LABEL: @test13(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp une double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test13_intrinsic(double %a) {
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; CHECK-LABEL: @test13_intrinsic(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp une double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test14(double %a) {
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; CHECK-LABEL: @test14(
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define i1 @fabs_oeq(double %a) {
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; CHECK-LABEL: @fabs_oeq(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp oeq double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call double @llvm.fabs.f64(double %a)
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%cmp = fcmp oeq double %call, 0.0
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ret i1 %cmp
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}
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define i32 @test14_intrinsic(double %a) {
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; CHECK-LABEL: @test14_intrinsic(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp oeq double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test15(double %a) {
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; CHECK-LABEL: @test15(
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define i1 @fabs_one(double %a) {
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; CHECK-LABEL: @fabs_one(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp one double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call double @llvm.fabs.f64(double %a)
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%cmp = fcmp one double %call, 0.0
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ret i1 %cmp
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}
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define i32 @test15_intrinsic(double %a) {
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; CHECK-LABEL: @test15_intrinsic(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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define <2 x i1> @fabs_ueq(<2 x float> %a) {
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; CHECK-LABEL: @fabs_ueq(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq <2 x float> [[A:%.*]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp one double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test16(double %a) {
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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%call = tail call double @fabs(double %a)
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%cmp = fcmp ueq double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @test16_intrinsic(double %a) {
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; CHECK-LABEL: @test16_intrinsic(
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], 0.000000e+00
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; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: ret i32 [[CONV]]
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;
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%call = tail call double @llvm.fabs.f64(double %a)
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%cmp = fcmp ueq double %call, 0.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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%call = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
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%cmp = fcmp ueq <2 x float> %call, zeroinitializer
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ret <2 x i1> %cmp
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}
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; Don't crash.
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