maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

AMDGPU/GlobalISel: InstrMapping for G_TRUNC 

llvm-svn: 326588
This commit is contained in:
Matt Arsenault 2018-03-02 16:55:33 +00:00
parent ef8db767d7
commit 1c1aab99ae
2 changed files with 41 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
View File

@ -314,6 +314,16 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
OpdsMapping[0] = OpdsMapping[1] = AMDGPU::getValueMapping(BankID, Size); OpdsMapping[0] = OpdsMapping[1] = AMDGPU::getValueMapping(BankID, Size);
break; break;
} }
case AMDGPU::G_TRUNC: {
unsigned Dst = MI.getOperand(0).getReg();
unsigned Src = MI.getOperand(1).getReg();
unsigned Bank = getRegBankID(Src, MRI, *TRI);
unsigned DstSize = getSizeInBits(Dst, MRI, *TRI);
unsigned SrcSize = getSizeInBits(Src, MRI, *TRI);
OpdsMapping[0] = AMDGPU::getValueMapping(Bank, DstSize);
OpdsMapping[1] = AMDGPU::getValueMapping(Bank, SrcSize);
break;
}
case AMDGPU::G_FCMP: { case AMDGPU::G_FCMP: {
unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();
unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, *TRI); unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, *TRI);

31
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir Normal file
View File

@ -0,0 +1,31 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
---
name: trunc_i64_to_i32_s
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: trunc_i64_to_i32_s
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[TRUNC:%[0-9]+]]:sgpr(s32) = G_TRUNC [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
%1:_(s32) = G_TRUNC %0
...
---
name: trunc_i64_to_i32_v
legalized: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: trunc_i64_to_i32_v
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s32) = G_TRUNC [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_TRUNC %0
...