forked from OSchip/llvm-project
AMDGPU/GlobalISel: InstrMapping for G_TRUNC
llvm-svn: 326588
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@ -314,6 +314,16 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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OpdsMapping[0] = OpdsMapping[1] = AMDGPU::getValueMapping(BankID, Size);
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break;
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}
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case AMDGPU::G_TRUNC: {
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unsigned Dst = MI.getOperand(0).getReg();
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unsigned Src = MI.getOperand(1).getReg();
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unsigned Bank = getRegBankID(Src, MRI, *TRI);
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unsigned DstSize = getSizeInBits(Dst, MRI, *TRI);
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unsigned SrcSize = getSizeInBits(Src, MRI, *TRI);
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OpdsMapping[0] = AMDGPU::getValueMapping(Bank, DstSize);
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OpdsMapping[1] = AMDGPU::getValueMapping(Bank, SrcSize);
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break;
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}
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case AMDGPU::G_FCMP: {
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unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();
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unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, *TRI);
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@ -0,0 +1,31 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
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---
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name: trunc_i64_to_i32_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; CHECK-LABEL: name: trunc_i64_to_i32_s
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[TRUNC:%[0-9]+]]:sgpr(s32) = G_TRUNC [[COPY]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_TRUNC %0
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...
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---
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name: trunc_i64_to_i32_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: trunc_i64_to_i32_v
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s32) = G_TRUNC [[COPY]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_TRUNC %0
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...
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