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[InstCombine] commonShiftTransforms - add support for pow2 nonuniform constant vectors in srem fold 

Note: we already fold srem to undef if any denominator vector element is undef.
This commit is contained in:
Simon Pilgrim 2020-10-09 15:59:19 +01:00
parent 99cafe0094
commit 1c040a3e56
2 changed files with 7 additions and 7 deletions
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10
llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
View File

@ -402,15 +402,15 @@ Instruction *InstCombinerImpl::commonShiftTransforms(BinaryOperator &I) {
return BinaryOperator::Create(
I.getOpcode(), Builder.CreateBinOp(I.getOpcode(), Op0, C), A);
// X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
// X shift (A srem C) -> X shift (A and (C - 1)) iff C is a power of 2.
// Because shifts by negative values (which could occur if A were negative)
// are undefined.
const APInt *B;
if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Constant(C))) &&
match(C, m_Power2())) {
// FIXME: Should this get moved into SimplifyDemandedBits by saying we don't
// demand the sign bit (and many others) here??
Value *Rem = Builder.CreateAnd(A, ConstantInt::get(I.getType(), *B - 1),
Op1->getName());
Constant *Mask = ConstantExpr::getSub(C, ConstantInt::get(I.getType(), 1));
Value *Rem = Builder.CreateAnd(A, Mask, Op1->getName());
return replaceOperand(I, 1, Rem);
}

4
llvm/test/Transforms/InstCombine/shift.ll
View File

@ -616,8 +616,8 @@ define <2 x i32> @test38_uniform(<2 x i32> %x) nounwind readnone {
define <3 x i32> @test38_nonuniform(<3 x i32> %x) nounwind readnone {
; CHECK-LABEL: @test38_nonuniform(
; CHECK-NEXT: [[REM:%.*]] = srem <3 x i32> [[X:%.*]], <i32 32, i32 16, i32 1>
; CHECK-NEXT: [[SHL:%.*]] = shl <3 x i32> <i32 1, i32 1, i32 1>, [[REM]]
; CHECK-NEXT: [[REM1:%.*]] = and <3 x i32> [[X:%.*]], <i32 31, i32 15, i32 0>
; CHECK-NEXT: [[SHL:%.*]] = shl <3 x i32> <i32 1, i32 1, i32 1>, [[REM1]]
; CHECK-NEXT: ret <3 x i32> [[SHL]]
;
%rem = srem <3 x i32> %x, <i32 32, i32 16, i32 1>