forked from OSchip/llvm-project
[PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI
This patch fixes the reversed behaviour exhibited by cpsgn on PPC. It now matches the ABI. Differential Revision: https://reviews.llvm.org/D84962
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@ -2996,12 +2996,12 @@ static __inline__ void __ATTRS_o_ai vec_xst_len_r(vector unsigned char __a,
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#ifdef __VSX__
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static __inline__ vector float __ATTRS_o_ai vec_cpsgn(vector float __a,
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vector float __b) {
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return __builtin_vsx_xvcpsgnsp(__a, __b);
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return __builtin_vsx_xvcpsgnsp(__b, __a);
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}
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static __inline__ vector double __ATTRS_o_ai vec_cpsgn(vector double __a,
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vector double __b) {
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return __builtin_vsx_xvcpsgndp(__a, __b);
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return __builtin_vsx_xvcpsgndp(__b, __a);
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}
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#endif
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@ -1850,3 +1850,47 @@ void testVectorInt128Pack(){
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// CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
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}
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void test_vector_cpsgn_float(vector float a, vector float b) {
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// CHECK-LABEL: test_vector_cpsgn_float
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// CHECK-DAG: load{{.*}}%__a
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// CHECK-DAG: load{{.*}}%__b
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// CHECK-NOT: SEPARATOR
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// CHECK-DAG: [[RA:%[0-9]+]] = load <4 x float>, <4 x float>* %__a.addr
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// CHECK-DAG: [[RB:%[0-9]+]] = load <4 x float>, <4 x float>* %__b.addr
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// CHECK-NEXT: call <4 x float> @llvm.copysign.v4f32(<4 x float> [[RB]], <4 x float> [[RA]])
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vec_cpsgn(a, b);
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}
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void test_vector_cpsgn_double(vector double a, vector double b) {
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// CHECK-LABEL: test_vector_cpsgn_double
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// CHECK-DAG: load{{.*}}%__a
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// CHECK-DAG: load{{.*}}%__b
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// CHECK-NOT: SEPARATOR
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// CHECK-DAG: [[RA:%[0-9]+]] = load <2 x double>, <2 x double>* %__a.addr
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// CHECK-DAG: [[RB:%[0-9]+]] = load <2 x double>, <2 x double>* %__b.addr
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// CHECK-NEXT: call <2 x double> @llvm.copysign.v2f64(<2 x double> [[RB]], <2 x double> [[RA]])
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vec_cpsgn(a, b);
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}
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void test_builtin_xvcpsgnsp(vector float a, vector float b) {
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// CHECK-LABEL: test_builtin_xvcpsgnsp
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// CHECK-DAG: load{{.*}}%a
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// CHECK-DAG: load{{.*}}%b
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// CHECK-NOT: SEPARATOR
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// CHECK-DAG: [[RA:%[0-9]+]] = load <4 x float>, <4 x float>* %a.addr
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// CHECK-DAG: [[RB:%[0-9]+]] = load <4 x float>, <4 x float>* %b.addr
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// CHECK-NEXT: call <4 x float> @llvm.copysign.v4f32(<4 x float> [[RA]], <4 x float> [[RB]])
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__builtin_vsx_xvcpsgnsp(a, b);
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}
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void test_builtin_xvcpsgndp(vector double a, vector double b) {
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// CHECK-LABEL: test_builtin_xvcpsgndp
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// CHECK-DAG: load{{.*}}%a
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// CHECK-DAG: load{{.*}}%b
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// CHECK-NOT: SEPARATOR
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// CHECK-DAG: [[RA:%[0-9]+]] = load <2 x double>, <2 x double>* %a.addr
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// CHECK-DAG: [[RB:%[0-9]+]] = load <2 x double>, <2 x double>* %b.addr
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// CHECK-NEXT: call <2 x double> @llvm.copysign.v2f64(<2 x double> [[RA]], <2 x double> [[RB]])
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__builtin_vsx_xvcpsgndp(a, b);
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}
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