forked from OSchip/llvm-project
[ARM] Update and regenerate test checks. NFC
This commit is contained in:
David Green
parent
6e2b6351d2
commit
1ae762469f
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@ -1760,102 +1760,199 @@ declare double @llvm.pow.f64(double, double)
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;
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; bl
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define float @debug_info(float %gamma, float %slopeLimit, i1 %or.cond, double %tmp) "frame-pointer"="all" {
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; ARM-LABEL: debug_info:
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; ARM: @ %bb.0: @ %bb
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; ARM-NEXT: push {r4, r7, lr}
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; ARM-NEXT: add r7, sp, #4
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; ARM-NEXT: sub r4, sp, #16
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; ARM-NEXT: bfc r4, #0, #4
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; ARM-NEXT: mov sp, r4
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; ARM-NEXT: tst r2, #1
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; ARM-NEXT: vst1.64 {d8, d9}, [r4:128]
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; ARM-NEXT: beq LBB12_2
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; ARM-NEXT: @ %bb.1: @ %bb3
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; ARM-NEXT: ldr r1, [r7, #8]
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; ARM-NEXT: vmov s16, r0
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; ARM-NEXT: mov r0, r3
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; ARM-NEXT: mov r2, r3
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; ARM-NEXT: vmov d9, r3, r1
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; ARM-NEXT: mov r3, r1
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; ARM-NEXT: bl _pow
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; ARM-NEXT: vmov.f32 s0, #1.000000e+00
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; ARM-NEXT: vmov.f64 d16, #1.000000e+00
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; ARM-NEXT: vadd.f64 d16, d9, d16
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; ARM-NEXT: vcmp.f32 s16, s0
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; ARM-NEXT: vmrs APSR_nzcv, fpscr
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; ARM-NEXT: vmov d17, r0, r1
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; ARM-NEXT: vmov.f64 d18, d9
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; ARM-NEXT: vadd.f64 d17, d17, d17
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; ARM-NEXT: vmovgt.f64 d18, d16
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; ARM-NEXT: vcmp.f64 d18, d9
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; ARM-NEXT: vmrs APSR_nzcv, fpscr
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; ARM-NEXT: vmovne.f64 d9, d17
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; ARM-NEXT: vcvt.f32.f64 s0, d9
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; ARM-NEXT: b LBB12_3
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; ARM-NEXT: LBB12_2:
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; ARM-NEXT: vldr s0, LCPI12_0
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; ARM-NEXT: LBB12_3: @ %bb13
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; ARM-NEXT: mov r4, sp
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; ARM-NEXT: vld1.64 {d8, d9}, [r4:128]
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; ARM-NEXT: vmov r0, s0
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; ARM-NEXT: sub sp, r7, #4
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; ARM-NEXT: pop {r4, r7, pc}
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; ARM-NEXT: .p2align 2
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; ARM-NEXT: @ %bb.4:
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; ARM-NEXT: .data_region
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; ARM-NEXT: LCPI12_0:
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; ARM-NEXT: .long 0 @ float 0
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; ARM-NEXT: .end_data_region
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; ARM-ENABLE-LABEL: debug_info:
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; ARM-ENABLE: @ %bb.0: @ %bb
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; ARM-ENABLE-NEXT: push {r4, r7, lr}
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; ARM-ENABLE-NEXT: add r7, sp, #4
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; ARM-ENABLE-NEXT: sub r4, sp, #16
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; ARM-ENABLE-NEXT: bfc r4, #0, #4
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; ARM-ENABLE-NEXT: mov sp, r4
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; ARM-ENABLE-NEXT: tst r2, #1
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; ARM-ENABLE-NEXT: vst1.64 {d8, d9}, [r4:128]
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; ARM-ENABLE-NEXT: beq LBB12_2
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; ARM-ENABLE-NEXT: @ %bb.1: @ %bb3
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; ARM-ENABLE-NEXT: ldr r1, [r7, #8]
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; ARM-ENABLE-NEXT: vmov s16, r0
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; ARM-ENABLE-NEXT: mov r0, r3
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; ARM-ENABLE-NEXT: mov r2, r3
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; ARM-ENABLE-NEXT: vmov d9, r3, r1
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; ARM-ENABLE-NEXT: mov r3, r1
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; ARM-ENABLE-NEXT: bl _pow
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; ARM-ENABLE-NEXT: vmov.f32 s0, #1.000000e+00
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; ARM-ENABLE-NEXT: vmov.f64 d16, #1.000000e+00
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; ARM-ENABLE-NEXT: vadd.f64 d16, d9, d16
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; ARM-ENABLE-NEXT: vcmp.f32 s16, s0
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; ARM-ENABLE-NEXT: vmrs APSR_nzcv, fpscr
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; ARM-ENABLE-NEXT: vmov d17, r0, r1
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; ARM-ENABLE-NEXT: vmov.f64 d18, d9
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; ARM-ENABLE-NEXT: vadd.f64 d17, d17, d17
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; ARM-ENABLE-NEXT: vmovgt.f64 d18, d16
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; ARM-ENABLE-NEXT: vcmp.f64 d18, d9
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; ARM-ENABLE-NEXT: vmrs APSR_nzcv, fpscr
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; ARM-ENABLE-NEXT: vmovne.f64 d9, d17
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; ARM-ENABLE-NEXT: vcvt.f32.f64 s0, d9
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; ARM-ENABLE-NEXT: b LBB12_3
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; ARM-ENABLE-NEXT: LBB12_2:
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; ARM-ENABLE-NEXT: vldr s0, LCPI12_0
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; ARM-ENABLE-NEXT: LBB12_3: @ %bb13
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; ARM-ENABLE-NEXT: mov r4, sp
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; ARM-ENABLE-NEXT: vld1.64 {d8, d9}, [r4:128]
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; ARM-ENABLE-NEXT: vmov r0, s0
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; ARM-ENABLE-NEXT: sub sp, r7, #4
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; ARM-ENABLE-NEXT: pop {r4, r7, pc}
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; ARM-ENABLE-NEXT: .p2align 2
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; ARM-ENABLE-NEXT: @ %bb.4:
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; ARM-ENABLE-NEXT: .data_region
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; ARM-ENABLE-NEXT: LCPI12_0:
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; ARM-ENABLE-NEXT: .long 0x00000000 @ float 0
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; ARM-ENABLE-NEXT: .end_data_region
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;
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; THUMB-LABEL: debug_info:
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; THUMB: @ %bb.0: @ %bb
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; THUMB-NEXT: push {r4, r7, lr}
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; THUMB-NEXT: add r7, sp, #4
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; THUMB-NEXT: sub.w r4, sp, #16
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; THUMB-NEXT: bfc r4, #0, #4
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; THUMB-NEXT: mov sp, r4
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; THUMB-NEXT: lsls r1, r2, #31
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; THUMB-NEXT: vst1.64 {d8, d9}, [r4:128]
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; THUMB-NEXT: beq LBB12_2
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; THUMB-NEXT: @ %bb.1: @ %bb3
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; THUMB-NEXT: ldr r1, [r7, #8]
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; THUMB-NEXT: vmov s16, r0
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; THUMB-NEXT: mov r0, r3
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; THUMB-NEXT: mov r2, r3
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; THUMB-NEXT: vmov d9, r3, r1
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; THUMB-NEXT: mov r3, r1
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; THUMB-NEXT: bl _pow
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; THUMB-NEXT: vmov.f32 s0, #1.000000e+00
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; THUMB-NEXT: vmov.f64 d16, #1.000000e+00
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; THUMB-NEXT: vmov.f64 d18, d9
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; THUMB-NEXT: vcmp.f32 s16, s0
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; THUMB-NEXT: vadd.f64 d16, d9, d16
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; THUMB-NEXT: vmrs APSR_nzcv, fpscr
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; THUMB-NEXT: it gt
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; THUMB-NEXT: vmovgt.f64 d18, d16
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; THUMB-NEXT: vcmp.f64 d18, d9
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; THUMB-NEXT: vmov d17, r0, r1
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; THUMB-NEXT: vmrs APSR_nzcv, fpscr
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; THUMB-NEXT: vadd.f64 d17, d17, d17
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; THUMB-NEXT: it ne
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; THUMB-NEXT: vmovne.f64 d9, d17
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; THUMB-NEXT: vcvt.f32.f64 s0, d9
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; THUMB-NEXT: b LBB12_3
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; THUMB-NEXT: LBB12_2:
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; THUMB-NEXT: vldr s0, LCPI12_0
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; THUMB-NEXT: LBB12_3: @ %bb13
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; THUMB-NEXT: mov r4, sp
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; THUMB-NEXT: vld1.64 {d8, d9}, [r4:128]
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; THUMB-NEXT: subs r4, r7, #4
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; THUMB-NEXT: vmov r0, s0
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; THUMB-NEXT: mov sp, r4
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; THUMB-NEXT: pop {r4, r7, pc}
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; THUMB-NEXT: .p2align 2
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; THUMB-NEXT: @ %bb.4:
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; THUMB-NEXT: .data_region
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; THUMB-NEXT: LCPI12_0:
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; THUMB-NEXT: .long 0 @ float 0
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; THUMB-NEXT: .end_data_region
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; ARM-DISABLE-LABEL: debug_info:
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; ARM-DISABLE: @ %bb.0: @ %bb
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; ARM-DISABLE-NEXT: push {r4, r7, lr}
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; ARM-DISABLE-NEXT: add r7, sp, #4
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; ARM-DISABLE-NEXT: sub r4, sp, #16
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; ARM-DISABLE-NEXT: bfc r4, #0, #4
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; ARM-DISABLE-NEXT: mov sp, r4
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; ARM-DISABLE-NEXT: tst r2, #1
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; ARM-DISABLE-NEXT: vst1.64 {d8, d9}, [r4:128]
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; ARM-DISABLE-NEXT: beq LBB12_2
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; ARM-DISABLE-NEXT: @ %bb.1: @ %bb3
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; ARM-DISABLE-NEXT: ldr r1, [r7, #8]
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; ARM-DISABLE-NEXT: vmov s16, r0
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; ARM-DISABLE-NEXT: mov r0, r3
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; ARM-DISABLE-NEXT: mov r2, r3
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; ARM-DISABLE-NEXT: vmov d9, r3, r1
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; ARM-DISABLE-NEXT: mov r3, r1
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; ARM-DISABLE-NEXT: bl _pow
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; ARM-DISABLE-NEXT: vmov.f32 s0, #1.000000e+00
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; ARM-DISABLE-NEXT: vmov.f64 d16, #1.000000e+00
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; ARM-DISABLE-NEXT: vadd.f64 d16, d9, d16
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; ARM-DISABLE-NEXT: vcmp.f32 s16, s0
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; ARM-DISABLE-NEXT: vmrs APSR_nzcv, fpscr
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; ARM-DISABLE-NEXT: vmov d17, r0, r1
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; ARM-DISABLE-NEXT: vmov.f64 d18, d9
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; ARM-DISABLE-NEXT: vadd.f64 d17, d17, d17
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; ARM-DISABLE-NEXT: vmovgt.f64 d18, d16
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; ARM-DISABLE-NEXT: vcmp.f64 d18, d9
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; ARM-DISABLE-NEXT: vmrs APSR_nzcv, fpscr
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; ARM-DISABLE-NEXT: vmovne.f64 d9, d17
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; ARM-DISABLE-NEXT: vcvt.f32.f64 s0, d9
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; ARM-DISABLE-NEXT: b LBB12_3
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; ARM-DISABLE-NEXT: LBB12_2:
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; ARM-DISABLE-NEXT: vldr s0, LCPI12_0
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; ARM-DISABLE-NEXT: LBB12_3: @ %bb13
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; ARM-DISABLE-NEXT: mov r4, sp
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; ARM-DISABLE-NEXT: vld1.64 {d8, d9}, [r4:128]
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; ARM-DISABLE-NEXT: vmov r0, s0
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; ARM-DISABLE-NEXT: sub sp, r7, #4
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; ARM-DISABLE-NEXT: pop {r4, r7, pc}
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; ARM-DISABLE-NEXT: .p2align 2
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; ARM-DISABLE-NEXT: @ %bb.4:
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; ARM-DISABLE-NEXT: .data_region
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; ARM-DISABLE-NEXT: LCPI12_0:
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; ARM-DISABLE-NEXT: .long 0x00000000 @ float 0
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; ARM-DISABLE-NEXT: .end_data_region
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;
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; THUMB-ENABLE-LABEL: debug_info:
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; THUMB-ENABLE: @ %bb.0: @ %bb
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; THUMB-ENABLE-NEXT: push {r4, r7, lr}
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; THUMB-ENABLE-NEXT: add r7, sp, #4
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; THUMB-ENABLE-NEXT: sub.w r4, sp, #16
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; THUMB-ENABLE-NEXT: bfc r4, #0, #4
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; THUMB-ENABLE-NEXT: mov sp, r4
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; THUMB-ENABLE-NEXT: lsls r1, r2, #31
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; THUMB-ENABLE-NEXT: vst1.64 {d8, d9}, [r4:128]
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; THUMB-ENABLE-NEXT: beq LBB12_2
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; THUMB-ENABLE-NEXT: @ %bb.1: @ %bb3
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; THUMB-ENABLE-NEXT: ldr r1, [r7, #8]
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; THUMB-ENABLE-NEXT: vmov s16, r0
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; THUMB-ENABLE-NEXT: mov r0, r3
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; THUMB-ENABLE-NEXT: mov r2, r3
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; THUMB-ENABLE-NEXT: vmov d9, r3, r1
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; THUMB-ENABLE-NEXT: mov r3, r1
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; THUMB-ENABLE-NEXT: bl _pow
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; THUMB-ENABLE-NEXT: vmov.f32 s0, #1.000000e+00
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; THUMB-ENABLE-NEXT: vmov.f64 d16, #1.000000e+00
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; THUMB-ENABLE-NEXT: vmov.f64 d18, d9
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; THUMB-ENABLE-NEXT: vcmp.f32 s16, s0
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; THUMB-ENABLE-NEXT: vadd.f64 d16, d9, d16
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; THUMB-ENABLE-NEXT: vmrs APSR_nzcv, fpscr
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; THUMB-ENABLE-NEXT: it gt
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; THUMB-ENABLE-NEXT: vmovgt.f64 d18, d16
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; THUMB-ENABLE-NEXT: vcmp.f64 d18, d9
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; THUMB-ENABLE-NEXT: vmov d17, r0, r1
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; THUMB-ENABLE-NEXT: vmrs APSR_nzcv, fpscr
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; THUMB-ENABLE-NEXT: vadd.f64 d17, d17, d17
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; THUMB-ENABLE-NEXT: it ne
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; THUMB-ENABLE-NEXT: vmovne.f64 d9, d17
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; THUMB-ENABLE-NEXT: vcvt.f32.f64 s0, d9
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; THUMB-ENABLE-NEXT: b LBB12_3
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; THUMB-ENABLE-NEXT: LBB12_2:
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; THUMB-ENABLE-NEXT: vldr s0, LCPI12_0
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; THUMB-ENABLE-NEXT: LBB12_3: @ %bb13
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; THUMB-ENABLE-NEXT: mov r4, sp
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; THUMB-ENABLE-NEXT: vld1.64 {d8, d9}, [r4:128]
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; THUMB-ENABLE-NEXT: subs r4, r7, #4
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; THUMB-ENABLE-NEXT: vmov r0, s0
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; THUMB-ENABLE-NEXT: mov sp, r4
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; THUMB-ENABLE-NEXT: pop {r4, r7, pc}
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; THUMB-ENABLE-NEXT: .p2align 2
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; THUMB-ENABLE-NEXT: @ %bb.4:
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; THUMB-ENABLE-NEXT: .data_region
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; THUMB-ENABLE-NEXT: LCPI12_0:
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; THUMB-ENABLE-NEXT: .long 0x00000000 @ float 0
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; THUMB-ENABLE-NEXT: .end_data_region
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;
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; THUMB-DISABLE-LABEL: debug_info:
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; THUMB-DISABLE: @ %bb.0: @ %bb
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; THUMB-DISABLE-NEXT: push {r4, r7, lr}
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; THUMB-DISABLE-NEXT: add r7, sp, #4
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; THUMB-DISABLE-NEXT: sub.w r4, sp, #16
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; THUMB-DISABLE-NEXT: bfc r4, #0, #4
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; THUMB-DISABLE-NEXT: mov sp, r4
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; THUMB-DISABLE-NEXT: lsls r1, r2, #31
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; THUMB-DISABLE-NEXT: vst1.64 {d8, d9}, [r4:128]
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; THUMB-DISABLE-NEXT: beq LBB12_2
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; THUMB-DISABLE-NEXT: @ %bb.1: @ %bb3
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; THUMB-DISABLE-NEXT: ldr r1, [r7, #8]
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; THUMB-DISABLE-NEXT: vmov s16, r0
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; THUMB-DISABLE-NEXT: mov r0, r3
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; THUMB-DISABLE-NEXT: mov r2, r3
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; THUMB-DISABLE-NEXT: vmov d9, r3, r1
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; THUMB-DISABLE-NEXT: mov r3, r1
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; THUMB-DISABLE-NEXT: bl _pow
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; THUMB-DISABLE-NEXT: vmov.f32 s0, #1.000000e+00
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; THUMB-DISABLE-NEXT: vmov.f64 d16, #1.000000e+00
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; THUMB-DISABLE-NEXT: vmov.f64 d18, d9
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; THUMB-DISABLE-NEXT: vcmp.f32 s16, s0
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; THUMB-DISABLE-NEXT: vadd.f64 d16, d9, d16
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; THUMB-DISABLE-NEXT: vmrs APSR_nzcv, fpscr
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; THUMB-DISABLE-NEXT: it gt
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; THUMB-DISABLE-NEXT: vmovgt.f64 d18, d16
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; THUMB-DISABLE-NEXT: vcmp.f64 d18, d9
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; THUMB-DISABLE-NEXT: vmov d17, r0, r1
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; THUMB-DISABLE-NEXT: vmrs APSR_nzcv, fpscr
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; THUMB-DISABLE-NEXT: vadd.f64 d17, d17, d17
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; THUMB-DISABLE-NEXT: it ne
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; THUMB-DISABLE-NEXT: vmovne.f64 d9, d17
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; THUMB-DISABLE-NEXT: vcvt.f32.f64 s0, d9
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; THUMB-DISABLE-NEXT: b LBB12_3
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; THUMB-DISABLE-NEXT: LBB12_2:
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; THUMB-DISABLE-NEXT: vldr s0, LCPI12_0
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; THUMB-DISABLE-NEXT: LBB12_3: @ %bb13
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; THUMB-DISABLE-NEXT: mov r4, sp
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; THUMB-DISABLE-NEXT: vld1.64 {d8, d9}, [r4:128]
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; THUMB-DISABLE-NEXT: subs r4, r7, #4
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; THUMB-DISABLE-NEXT: vmov r0, s0
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; THUMB-DISABLE-NEXT: mov sp, r4
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; THUMB-DISABLE-NEXT: pop {r4, r7, pc}
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; THUMB-DISABLE-NEXT: .p2align 2
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; THUMB-DISABLE-NEXT: @ %bb.4:
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; THUMB-DISABLE-NEXT: .data_region
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; THUMB-DISABLE-NEXT: LCPI12_0:
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; THUMB-DISABLE-NEXT: .long 0x00000000 @ float 0
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; THUMB-DISABLE-NEXT: .end_data_region
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bb:
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br i1 %or.cond, label %bb3, label %bb13
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@ -1,9 +1,21 @@
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; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8M
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; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s --check-prefix=CHECK-V8
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=CHECK-V8M
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; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s --check-prefix=CHECK-V8A
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; CHECK-LABEL: pre_inc_ldr
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; CHECK: ldr{{.*}}, [r0, #4]!
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define i32* @pre_inc_ldr(i32* %base, i32 %a) {
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; CHECK-V8M-LABEL: pre_inc_ldr:
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; CHECK-V8M: @ %bb.0:
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; CHECK-V8M-NEXT: ldr r2, [r0, #4]!
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; CHECK-V8M-NEXT: add r1, r2
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; CHECK-V8M-NEXT: str r1, [r0, #4]
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; CHECK-V8M-NEXT: bx lr
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;
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; CHECK-V8A-LABEL: pre_inc_ldr:
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; CHECK-V8A: @ %bb.0:
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; CHECK-V8A-NEXT: ldr r2, [r0, #4]!
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; CHECK-V8A-NEXT: add r1, r2, r1
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #4]
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 1
|
||||
%ld = load i32, i32* %addr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 2
|
||||
|
|
@ -12,9 +24,20 @@ define i32* @pre_inc_ldr(i32* %base, i32 %a) {
|
|||
ret i32* %addr
|
||||
}
|
||||
|
||||
; CHECK-LABEL: pre_dec_ldr
|
||||
; CHECK: ldr{{.*}}, [r0, #-4]!
|
||||
define i32* @pre_dec_ldr(i32* %base, i32 %a) {
|
||||
; CHECK-V8M-LABEL: pre_dec_ldr:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldr r2, [r0, #-4]!
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #12]
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: pre_dec_ldr:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldr r2, [r0, #-4]!
|
||||
; CHECK-V8A-NEXT: add r1, r2, r1
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #12]
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 -1
|
||||
%ld = load i32, i32* %addr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 2
|
||||
|
|
@ -23,9 +46,20 @@ define i32* @pre_dec_ldr(i32* %base, i32 %a) {
|
|||
ret i32* %addr
|
||||
}
|
||||
|
||||
; CHECK-LABEL: post_inc_ldr
|
||||
; CHECK: ldr{{.*}}, [r0], #4
|
||||
define i32* @post_inc_ldr(i32* %base, i32* %addr.2, i32 %a) {
|
||||
; CHECK-V8M-LABEL: post_inc_ldr:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldr r3, [r0], #4
|
||||
; CHECK-V8M-NEXT: add r2, r3
|
||||
; CHECK-V8M-NEXT: str r2, [r1]
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: post_inc_ldr:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldr r3, [r0], #4
|
||||
; CHECK-V8A-NEXT: add r2, r3, r2
|
||||
; CHECK-V8A-NEXT: str r2, [r1]
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 0
|
||||
%ld = load i32, i32* %addr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 1
|
||||
|
|
@ -34,9 +68,20 @@ define i32* @post_inc_ldr(i32* %base, i32* %addr.2, i32 %a) {
|
|||
ret i32* %addr.1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: post_dec_ldr
|
||||
; CHECK: ldr{{.*}}, [r0], #-4
|
||||
define i32* @post_dec_ldr(i32* %base, i32* %addr.2, i32 %a) {
|
||||
; CHECK-V8M-LABEL: post_dec_ldr:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldr r3, [r0], #-4
|
||||
; CHECK-V8M-NEXT: add r2, r3
|
||||
; CHECK-V8M-NEXT: str r2, [r1]
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: post_dec_ldr:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldr r3, [r0], #-4
|
||||
; CHECK-V8A-NEXT: add r2, r3, r2
|
||||
; CHECK-V8A-NEXT: str r2, [r1]
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 0
|
||||
%ld = load i32, i32* %addr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 -1
|
||||
|
|
@ -45,36 +90,72 @@ define i32* @post_dec_ldr(i32* %base, i32* %addr.2, i32 %a) {
|
|||
ret i32* %addr.1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: pre_inc_str
|
||||
; CHECK: str{{.*}}, [r0, #4]!
|
||||
define i32* @pre_inc_str(i32* %base, i32 %a, i32 %b) {
|
||||
; CHECK-V8M-LABEL: pre_inc_str:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #4]!
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: pre_inc_str:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #4]!
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 1
|
||||
%res = add i32 %a, %b
|
||||
store i32 %res, i32* %addr.1
|
||||
ret i32* %addr.1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: pre_dec_str
|
||||
; CHECK: str{{.*}}, [r0, #-4]!
|
||||
define i32* @pre_dec_str(i32* %base, i32 %a, i32 %b) {
|
||||
; CHECK-V8M-LABEL: pre_dec_str:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #-4]!
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: pre_dec_str:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #-4]!
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%res = add i32 %a, %b
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 -1
|
||||
store i32 %res, i32* %addr.1
|
||||
ret i32* %addr.1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: post_inc_str
|
||||
; CHECK: str{{.*}}, [r0], #4
|
||||
define i32* @post_inc_str(i32* %base, i32 %a, i32 %b) {
|
||||
; CHECK-V8M-LABEL: post_inc_str:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0], #4
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: post_inc_str:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0], #4
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 1
|
||||
%res = add i32 %a, %b
|
||||
store i32 %res, i32* %base
|
||||
ret i32* %addr.1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: post_dec_str
|
||||
; CHECK: str{{.*}}, [r0], #-4
|
||||
define i32* @post_dec_str(i32* %base, i32 %a, i32 %b) {
|
||||
; CHECK-V8M-LABEL: post_dec_str:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0], #-4
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: post_dec_str:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0], #-4
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 -1
|
||||
%res = add i32 %a, %b
|
||||
store i32 %res, i32* %base
|
||||
|
|
@ -82,9 +163,22 @@ define i32* @post_dec_str(i32* %base, i32 %a, i32 %b) {
|
|||
}
|
||||
|
||||
; TODO: Generate ldrd
|
||||
; CHECK-LABEL: pre_inc_ldrd
|
||||
; CHECK: ldr{{.*}}, #4]!
|
||||
define i32* @pre_inc_ldrd(i32* %base) {
|
||||
; CHECK-V8M-LABEL: pre_inc_ldrd:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldr r1, [r0, #4]!
|
||||
; CHECK-V8M-NEXT: ldr r2, [r0, #4]
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #8]
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: pre_inc_ldrd:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldr r1, [r0, #4]!
|
||||
; CHECK-V8A-NEXT: ldr r2, [r0, #4]
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #8]
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 1
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 2
|
||||
%addr.2 = getelementptr i32, i32* %base, i32 3
|
||||
|
|
@ -96,9 +190,22 @@ define i32* @pre_inc_ldrd(i32* %base) {
|
|||
}
|
||||
|
||||
; TODO: Generate ldrd
|
||||
; CHECK-LABEL: pre_dec_ldrd
|
||||
; CHECK: ldr{{.*}}, #-4]!
|
||||
define i32* @pre_dec_ldrd(i32* %base) {
|
||||
; CHECK-V8M-LABEL: pre_dec_ldrd:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldr r1, [r0, #-4]!
|
||||
; CHECK-V8M-NEXT: ldr r2, [r0, #-4]
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #-8]
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: pre_dec_ldrd:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldr r1, [r0, #-4]!
|
||||
; CHECK-V8A-NEXT: ldr r2, [r0, #-4]
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #-8]
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 -1
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 -2
|
||||
%addr.2 = getelementptr i32, i32* %base, i32 -3
|
||||
|
|
@ -110,11 +217,22 @@ define i32* @pre_dec_ldrd(i32* %base) {
|
|||
}
|
||||
|
||||
; TODO: Generate post inc
|
||||
; CHECK-LABEL: post_inc_ldrd
|
||||
; CHECK-V8M: ldrd{{.*}}, [r0]
|
||||
; CHECK-V8: ldm
|
||||
; CHECK: add{{.*}}, #8
|
||||
define i32* @post_inc_ldrd(i32* %base, i32* %addr.3) {
|
||||
; CHECK-V8M-LABEL: post_inc_ldrd:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldrd r2, r3, [r0]
|
||||
; CHECK-V8M-NEXT: adds r0, #8
|
||||
; CHECK-V8M-NEXT: add r2, r3
|
||||
; CHECK-V8M-NEXT: str r2, [r1]
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: post_inc_ldrd:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldm r0, {r2, r3}
|
||||
; CHECK-V8A-NEXT: add r0, r0, #8
|
||||
; CHECK-V8A-NEXT: add r2, r2, r3
|
||||
; CHECK-V8A-NEXT: str r2, [r1]
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 0
|
||||
%ld = load i32, i32* %addr
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 1
|
||||
|
|
@ -125,9 +243,20 @@ define i32* @post_inc_ldrd(i32* %base, i32* %addr.3) {
|
|||
ret i32* %addr.2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: pre_inc_str_multi
|
||||
; CHECK: str{{.*}}, #8]!
|
||||
define i32* @pre_inc_str_multi(i32* %base) {
|
||||
; CHECK-V8M-LABEL: pre_inc_str_multi:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldrd r1, r2, [r0]
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #8]!
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: pre_inc_str_multi:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldm r0, {r1, r2}
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #8]!
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 0
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 1
|
||||
%ld = load i32, i32* %addr
|
||||
|
|
@ -138,9 +267,20 @@ define i32* @pre_inc_str_multi(i32* %base) {
|
|||
ret i32* %addr.2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: pre_dec_str_multi
|
||||
; CHECK: str{{.*}}, #-4]!
|
||||
define i32* @pre_dec_str_multi(i32* %base) {
|
||||
; CHECK-V8M-LABEL: pre_dec_str_multi:
|
||||
; CHECK-V8M: @ %bb.0:
|
||||
; CHECK-V8M-NEXT: ldrd r1, r2, [r0]
|
||||
; CHECK-V8M-NEXT: add r1, r2
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #-4]!
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: pre_dec_str_multi:
|
||||
; CHECK-V8A: @ %bb.0:
|
||||
; CHECK-V8A-NEXT: ldm r0, {r1, r2}
|
||||
; CHECK-V8A-NEXT: add r1, r1, r2
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #-4]!
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
%addr = getelementptr i32, i32* %base, i32 0
|
||||
%addr.1 = getelementptr i32, i32* %base, i32 1
|
||||
%ld = load i32, i32* %addr
|
||||
|
|
@ -151,9 +291,18 @@ define i32* @pre_dec_str_multi(i32* %base) {
|
|||
ret i32* %addr.2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: illegal_pre_inc_store_1
|
||||
; CHECK-NOT: str{{.*}} ]!
|
||||
define i32* @illegal_pre_inc_store_1(i32* %base) {
|
||||
; CHECK-V8M-LABEL: illegal_pre_inc_store_1:
|
||||
; CHECK-V8M: @ %bb.0: @ %entry
|
||||
; CHECK-V8M-NEXT: str r0, [r0, #8]
|
||||
; CHECK-V8M-NEXT: adds r0, #8
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: illegal_pre_inc_store_1:
|
||||
; CHECK-V8A: @ %bb.0: @ %entry
|
||||
; CHECK-V8A-NEXT: str r0, [r0, #8]
|
||||
; CHECK-V8A-NEXT: add r0, r0, #8
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
entry:
|
||||
%ptr.to.use = getelementptr i32, i32* %base, i32 2
|
||||
%ptr.to.store = ptrtoint i32* %base to i32
|
||||
|
|
@ -161,12 +310,20 @@ entry:
|
|||
ret i32* %ptr.to.use
|
||||
}
|
||||
|
||||
; TODO: The mov should be unecessary
|
||||
; CHECK-LABEL: legal_pre_inc_store_needs_copy_1
|
||||
; CHECK: add{{.*}}, #8
|
||||
; CHECK-NOT: str{{.*}}]!
|
||||
; CHECK: mov
|
||||
define i32* @legal_pre_inc_store_needs_copy_1(i32* %base) {
|
||||
; CHECK-V8M-LABEL: legal_pre_inc_store_needs_copy_1:
|
||||
; CHECK-V8M: @ %bb.0: @ %entry
|
||||
; CHECK-V8M-NEXT: add.w r1, r0, #8
|
||||
; CHECK-V8M-NEXT: str r1, [r0, #8]
|
||||
; CHECK-V8M-NEXT: mov r0, r1
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: legal_pre_inc_store_needs_copy_1:
|
||||
; CHECK-V8A: @ %bb.0: @ %entry
|
||||
; CHECK-V8A-NEXT: add r1, r0, #8
|
||||
; CHECK-V8A-NEXT: str r1, [r0, #8]
|
||||
; CHECK-V8A-NEXT: mov r0, r1
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
entry:
|
||||
%ptr.to.use = getelementptr i32, i32* %base, i32 2
|
||||
%ptr.to.store = ptrtoint i32* %ptr.to.use to i32
|
||||
|
|
@ -174,10 +331,18 @@ entry:
|
|||
ret i32* %ptr.to.use
|
||||
}
|
||||
|
||||
; CHECK-LABEL: legal_pre_inc_store_needs_copy_2
|
||||
; CHECK-NOT: mov
|
||||
; CHECK-NOT: str{{.*}}]!
|
||||
define i32* @legal_pre_inc_store_needs_copy_2(i32 %base) {
|
||||
; CHECK-V8M-LABEL: legal_pre_inc_store_needs_copy_2:
|
||||
; CHECK-V8M: @ %bb.0: @ %entry
|
||||
; CHECK-V8M-NEXT: str r0, [r0, #8]
|
||||
; CHECK-V8M-NEXT: adds r0, #8
|
||||
; CHECK-V8M-NEXT: bx lr
|
||||
;
|
||||
; CHECK-V8A-LABEL: legal_pre_inc_store_needs_copy_2:
|
||||
; CHECK-V8A: @ %bb.0: @ %entry
|
||||
; CHECK-V8A-NEXT: str r0, [r0, #8]
|
||||
; CHECK-V8A-NEXT: add r0, r0, #8
|
||||
; CHECK-V8A-NEXT: bx lr
|
||||
entry:
|
||||
%ptr = inttoptr i32 %base to i32*
|
||||
%ptr.to.use = getelementptr i32, i32* %ptr, i32 2
|
||||
|
|
|
|||
Loading…
Reference in New Issue