[stackprotector] When finding the split point to splice off the end of a parentmbb into a successmbb, include any DBG_VALUE MI.

Fix for PR16954.

llvm-svn: 188987
This commit is contained in:
Michael Gottesman 2013-08-22 05:40:50 +00:00
parent e6960e2db5
commit 1adac3582d
2 changed files with 143 additions and 9 deletions

View File

@ -1147,11 +1147,53 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
SDB->SPDescriptor.resetPerFunctionState();
}
/// Given that the input MI is before a partial terminator sequence TSeq, return
/// true if M + TSeq also a partial terminator sequence.
///
/// A Terminator sequence is a sequence of MachineInstrs which at this point in
/// lowering copy vregs into physical registers, which are then passed into
/// terminator instructors so we can satisfy ABI constraints. A partial
/// terminator sequence is an improper subset of a terminator sequence (i.e. it
/// may be the whole terminator sequence).
static bool MIIsInTerminatorSequence(const MachineInstr *MI) {
// If we do not have a copy or an implicit def, we return true if and only if
// MI is a debug value.
if (!MI->isCopy() && !MI->isImplicitDef())
// Sometimes DBG_VALUE MI sneak in between the copies from the vregs to the
// physical registers if there is debug info associated with the terminator
// of our mbb. We want to include said debug info in our terminator
// sequence, so we return true in that case.
return MI->isDebugValue();
// If we are not defining a register that is a physical register via a copy or
// are defining a register via an implicit def, we have left the terminator
// sequence.
MachineInstr::const_mop_iterator OPI = MI->operands_begin();
if (!OPI->isReg() || !OPI->isDef() ||
(!TargetRegisterInfo::isPhysicalRegister(OPI->getReg()) &&
!MI->isImplicitDef()))
return false;
return true;
}
/// Find the split point at which to splice the end of BB into its success stack
/// protector check machine basic block.
///
/// On many platforms, due to ABI constraints, terminators, even before register
/// allocation, use physical registers. This creates an issue for us since
/// physical registers at this point can not travel across basic
/// blocks. Luckily, selectiondag always moves physical registers into vregs
/// when they enter functions and moves them through a sequence of copies back
/// into the physical registers right before the terminator creating a
/// ``Terminator Sequence''. This function is searching for the beginning of the
/// terminator sequence so that we can ensure that we splice off not just the
/// terminator, but additionally the copies that move the vregs into the
/// physical registers.
static MachineBasicBlock::iterator
FindSplitPointForStackProtector(MachineBasicBlock *BB, DebugLoc DL) {
MachineBasicBlock::iterator SplitPoint = BB->getFirstTerminator();
MachineBasicBlock::iterator SplitPoint = BB->getFirstTerminator();
//
if (SplitPoint == BB->begin())
return SplitPoint;
@ -1159,14 +1201,7 @@ FindSplitPointForStackProtector(MachineBasicBlock *BB, DebugLoc DL) {
MachineBasicBlock::iterator Previous = SplitPoint;
--Previous;
while (Previous->isCopy() || Previous->isImplicitDef()) {
MachineInstr::mop_iterator OPI = Previous->operands_begin();
if (!OPI->isReg() || !OPI->isDef() ||
(!TargetRegisterInfo::isPhysicalRegister(OPI->getReg()) &&
!Previous->isImplicitDef()))
break;
while (MIIsInTerminatorSequence(Previous)) {
SplitPoint = Previous;
if (Previous == Start)
break;

View File

@ -0,0 +1,99 @@
; RUN: llc -mtriple=x86_64-apple-darwin < %s -o -
; PR16954
;
; Make sure that when we splice off the end of a machine basic block, we include
; DBG_VALUE MI in the terminator sequence.
@a = external global { i64, [56 x i8] }, align 32
; Function Attrs: nounwind sspreq
define i32 @_Z18read_response_sizev() #0 {
entry:
tail call void @llvm.dbg.value(metadata !22, i64 0, metadata !23), !dbg !39
%0 = load i64* getelementptr inbounds ({ i64, [56 x i8] }* @a, i32 0, i32 0), align 8, !dbg !40, !tbaa !60
tail call void @llvm.dbg.value(metadata !63, i64 0, metadata !64), !dbg !71
%1 = trunc i64 %0 to i32
ret i32 %1
}
; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata)
attributes #0 = { sspreq }
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!21}
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