forked from OSchip/llvm-project
[clang][CodeGen] Add _BitInt test coverage to builtins-elementwise-math.c
As suggested on D117898, we should be testing irregular _BitInt types with the __builtin_elementwise_* intrinsics
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@ -10,7 +10,8 @@ bar b;
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void test_builtin_elementwise_abs(float f1, float f2, double d1, double d2,
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float4 vf1, float4 vf2, si8 vi1, si8 vi2,
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long long int i1, long long int i2, short si) {
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long long int i1, long long int i2, short si,
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_BitInt(31) bi1, _BitInt(31) bi2) {
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// CHECK-LABEL: define void @test_builtin_elementwise_abs(
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// CHECK: [[F1:%.+]] = load float, float* %f1.addr, align 4
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// CHECK-NEXT: call float @llvm.fabs.f32(float [[F1]])
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@ -37,6 +38,10 @@ void test_builtin_elementwise_abs(float f1, float f2, double d1, double d2,
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const si8 cvi2 = vi2;
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vi2 = __builtin_elementwise_abs(cvi2);
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// CHECK: [[BI1:%.+]] = load i31, i31* %bi1.addr, align 4
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// CHECK-NEXT: call i31 @llvm.abs.i31(i31 [[BI1]], i1 false)
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bi2 = __builtin_elementwise_abs(bi1);
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// CHECK: [[IA1:%.+]] = load i32, i32 addrspace(1)* @int_as_one, align 4
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// CHECK-NEXT: call i32 @llvm.abs.i32(i32 [[IA1]], i1 false)
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b = __builtin_elementwise_abs(int_as_one);
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@ -54,7 +59,9 @@ void test_builtin_elementwise_abs(float f1, float f2, double d1, double d2,
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void test_builtin_elementwise_max(float f1, float f2, double d1, double d2,
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float4 vf1, float4 vf2, long long int i1,
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long long int i2, si8 vi1, si8 vi2,
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unsigned u1, unsigned u2, u4 vu1, u4 vu2) {
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unsigned u1, unsigned u2, u4 vu1, u4 vu2,
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_BitInt(31) bi1, _BitInt(31) bi2,
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unsigned _BitInt(55) bu1, unsigned _BitInt(55) bu2) {
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// CHECK-LABEL: define void @test_builtin_elementwise_max(
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// CHECK: [[F1:%.+]] = load float, float* %f1.addr, align 4
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// CHECK-NEXT: [[F2:%.+]] = load float, float* %f2.addr, align 4
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@ -99,6 +106,16 @@ void test_builtin_elementwise_max(float f1, float f2, double d1, double d2,
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// CHECK-NEXT: call <4 x i32> @llvm.umax.v4i32(<4 x i32> [[VU1]], <4 x i32> [[VU2]])
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vu1 = __builtin_elementwise_max(vu1, vu2);
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// CHECK: [[BI1:%.+]] = load i31, i31* %bi1.addr, align 4
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// CHECK-NEXT: [[BI2:%.+]] = load i31, i31* %bi2.addr, align 4
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// CHECK-NEXT: call i31 @llvm.smax.i31(i31 [[BI1]], i31 [[BI2]])
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bi1 = __builtin_elementwise_max(bi1, bi2);
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// CHECK: [[BU1:%.+]] = load i55, i55* %bu1.addr, align 8
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// CHECK-NEXT: [[BU2:%.+]] = load i55, i55* %bu2.addr, align 8
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// CHECK-NEXT: call i55 @llvm.umax.i55(i55 [[BU1]], i55 [[BU2]])
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bu1 = __builtin_elementwise_max(bu1, bu2);
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// CHECK: [[CVF1:%.+]] = load <4 x float>, <4 x float>* %cvf1, align 16
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// CHECK-NEXT: [[VF2:%.+]] = load <4 x float>, <4 x float>* %vf2.addr, align 16
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// CHECK-NEXT: call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[CVF1]], <4 x float> [[VF2]])
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@ -122,7 +139,9 @@ void test_builtin_elementwise_max(float f1, float f2, double d1, double d2,
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void test_builtin_elementwise_min(float f1, float f2, double d1, double d2,
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float4 vf1, float4 vf2, long long int i1,
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long long int i2, si8 vi1, si8 vi2,
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unsigned u1, unsigned u2, u4 vu1, u4 vu2) {
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unsigned u1, unsigned u2, u4 vu1, u4 vu2,
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_BitInt(31) bi1, _BitInt(31) bi2,
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unsigned _BitInt(55) bu1, unsigned _BitInt(55) bu2) {
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// CHECK-LABEL: define void @test_builtin_elementwise_min(
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// CHECK: [[F1:%.+]] = load float, float* %f1.addr, align 4
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// CHECK-NEXT: [[F2:%.+]] = load float, float* %f2.addr, align 4
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@ -173,6 +192,16 @@ void test_builtin_elementwise_min(float f1, float f2, double d1, double d2,
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// CHECK-NEXT: call <4 x i32> @llvm.umin.v4i32(<4 x i32> [[VU1]], <4 x i32> [[VU2]])
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vu1 = __builtin_elementwise_min(vu1, vu2);
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// CHECK: [[BI1:%.+]] = load i31, i31* %bi1.addr, align 4
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// CHECK-NEXT: [[BI2:%.+]] = load i31, i31* %bi2.addr, align 4
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// CHECK-NEXT: call i31 @llvm.smin.i31(i31 [[BI1]], i31 [[BI2]])
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bi1 = __builtin_elementwise_min(bi1, bi2);
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// CHECK: [[BU1:%.+]] = load i55, i55* %bu1.addr, align 8
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// CHECK-NEXT: [[BU2:%.+]] = load i55, i55* %bu2.addr, align 8
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// CHECK-NEXT: call i55 @llvm.umin.i55(i55 [[BU1]], i55 [[BU2]])
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bu1 = __builtin_elementwise_min(bu1, bu2);
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// CHECK: [[CVF1:%.+]] = load <4 x float>, <4 x float>* %cvf1, align 16
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// CHECK-NEXT: [[VF2:%.+]] = load <4 x float>, <4 x float>* %vf2.addr, align 16
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// CHECK-NEXT: call <4 x float> @llvm.minnum.v4f32(<4 x float> [[CVF1]], <4 x float> [[VF2]])
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