forked from OSchip/llvm-project
[X86][AVX] Renamed vperm2f128 tests to make it quicker to review
llvm-svn: 266621
This commit is contained in:
Simon Pilgrim
parent
1c14dc4c5a
commit
1a87a93dff
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@ -2,8 +2,8 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX2
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define <8 x float> @A(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: A:
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define <8 x float> @shuffle_v8f32_45670123(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_45670123:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
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; ALL-NEXT: retq
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@ -12,8 +12,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @B(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: B:
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define <8 x float> @shuffle_v8f32_0123cdef(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_0123cdef:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
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; ALL-NEXT: retq
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@ -22,8 +22,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @C(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: C:
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define <8 x float> @shuffle_v8f32_01230123(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_01230123:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; ALL-NEXT: retq
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@ -32,8 +32,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @D(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: D:
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define <8 x float> @shuffle_v8f32_45674567(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_45674567:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; ALL-NEXT: retq
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@ -52,8 +52,8 @@ entry:
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ret <32 x i8> %shuffle
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}
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define <4 x i64> @E2(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: E2:
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define <4 x i64> @shuffle_v4i64_6701(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v4i64_6701:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1]
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; ALL-NEXT: retq
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@ -62,35 +62,14 @@ entry:
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ret <4 x i64> %shuffle
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}
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define <32 x i8> @Ei(<32 x i8> %a, <32 x i8> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: Ei:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: Ei:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpaddb {{.*}}(%rip), %ymm0, %ymm0
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; AVX2-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; AVX2-NEXT: retq
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entry:
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; add forces execution domain
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%a2 = add <32 x i8> %a, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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%shuffle = shufflevector <32 x i8> %a2, <32 x i8> %b, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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ret <32 x i8> %shuffle
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}
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define <4 x i64> @E2i(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E2i:
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define <4 x i64> @shuffle_v4i64_6701_domain(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: shuffle_v4i64_6701_domain:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E2i:
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; AVX2-LABEL: shuffle_v4i64_6701_domain:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
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; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0
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@ -103,8 +82,29 @@ entry:
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ret <4 x i64> %shuffle
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}
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define <8 x i32> @E3i(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E3i:
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define <32 x i8> @shuffle_v32i8_2323(<32 x i8> %a, <32 x i8> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: shuffle_v32i8_2323:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: shuffle_v32i8_2323:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpaddb {{.*}}(%rip), %ymm0, %ymm0
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; AVX2-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; AVX2-NEXT: retq
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entry:
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; add forces execution domain
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%a2 = add <32 x i8> %a, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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%shuffle = shufflevector <32 x i8> %a2, <32 x i8> %b, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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ret <32 x i8> %shuffle
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}
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define <8 x i32> @shuffle_v8i32_u5u7cdef(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: shuffle_v8i32_u5u7cdef:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0
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@ -112,7 +112,7 @@ define <8 x i32> @E3i(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp
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; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E3i:
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; AVX2-LABEL: shuffle_v8i32_u5u7cdef:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2
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; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0
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@ -125,14 +125,14 @@ entry:
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ret <8 x i32> %shuffle
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}
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define <16 x i16> @E4i(<16 x i16> %a, <16 x i16> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E4i:
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define <16 x i16> @shuffle_v16i16_4501(<16 x i16> %a, <16 x i16> %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: shuffle_v16i16_4501:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E4i:
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; AVX2-LABEL: shuffle_v16i16_4501:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0
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; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
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@ -144,8 +144,8 @@ entry:
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ret <16 x i16> %shuffle
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}
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define <16 x i16> @E5i(<16 x i16>* %a, <16 x i16>* %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: E5i:
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define <16 x i16> @shuffle_v16i16_4501_mem(<16 x i16>* %a, <16 x i16>* %b) nounwind uwtable readnone ssp {
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; AVX1-LABEL: shuffle_v16i16_4501_mem:
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; AVX1: ## BB#0: ## %entry
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; AVX1-NEXT: vmovdqa (%rdi), %ymm0
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; AVX1-NEXT: vmovaps (%rsi), %ymm1
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@ -153,7 +153,7 @@ define <16 x i16> @E5i(<16 x i16>* %a, <16 x i16>* %b) nounwind uwtable readnone
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; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: E5i:
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; AVX2-LABEL: shuffle_v16i16_4501_mem:
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; AVX2: ## BB#0: ## %entry
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; AVX2-NEXT: vmovdqa (%rdi), %ymm0
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; AVX2-NEXT: vmovdqa (%rsi), %ymm1
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@ -170,8 +170,8 @@ entry:
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;;;; Cases with undef indicies mixed in the mask
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define <8 x float> @F(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F:
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define <8 x float> @shuffle_v8f32_uu67u9ub(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_uu67u9ub:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[0,1]
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; ALL-NEXT: retq
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@ -180,8 +180,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @F2(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F2:
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define <8 x float> @shuffle_v8f32_uu67uu67(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_uu67uu67:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; ALL-NEXT: retq
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@ -190,8 +190,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @F3(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F3:
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define <8 x float> @shuffle_v8f32_uu67uuab(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_uu67uuab:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[0,1]
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; ALL-NEXT: retq
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@ -200,8 +200,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @F4(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F4:
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define <8 x float> @shuffle_v8f32_uu67uuef(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_uu67uuef:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3]
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; ALL-NEXT: retq
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@ -210,8 +210,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @F5(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F5:
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define <8 x float> @shuffle_v8f32_uu674567(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_uu674567:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; ALL-NEXT: retq
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@ -220,8 +220,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @F6(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F6:
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define <8 x float> @shuffle_v8f32_uu6789ab(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_uu6789ab:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[0,1]
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; ALL-NEXT: retq
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@ -230,8 +230,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @F7(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F7:
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define <8 x float> @shuffle_v8f32_4567uu67(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_4567uu67:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; ALL-NEXT: retq
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@ -240,8 +240,8 @@ entry:
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ret <8 x float> %shuffle
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}
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define <8 x float> @F8(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: F8:
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define <8 x float> @shuffle_v8f32_4567uuef(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_4567uuef:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3]
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; ALL-NEXT: retq
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@ -252,8 +252,8 @@ entry:
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;;;; Cases we must not select vperm2f128
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define <8 x float> @G(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: G:
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define <8 x float> @shuffle_v8f32_uu67ucuf(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
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; ALL-LABEL: shuffle_v8f32_uu67ucuf:
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; ALL: ## BB#0: ## %entry
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm1[2,3]
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; ALL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,2,3,4,4,6,7]
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@ -267,8 +267,8 @@ entry:
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;; PR22984: https://llvm.org/bugs/show_bug.cgi?id=22984
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;; Prefer xor+vblendpd over vperm2f128 because that has better performance.
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define <4 x double> @vperm2z_0x08(<4 x double> %a) {
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; ALL-LABEL: vperm2z_0x08:
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define <4 x double> @shuffle_v4f64_zz01(<4 x double> %a) {
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; ALL-LABEL: shuffle_v4f64_zz01:
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; ALL: ## BB#0:
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; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm0[0,1]
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; ALL-NEXT: retq
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@ -276,8 +276,8 @@ define <4 x double> @vperm2z_0x08(<4 x double> %a) {
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ret <4 x double> %s
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}
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define <4 x double> @vperm2z_0x18(<4 x double> %a) {
|
||||
; ALL-LABEL: vperm2z_0x18:
|
||||
define <4 x double> @shuffle_v4f64_zz23(<4 x double> %a) {
|
||||
; ALL-LABEL: shuffle_v4f64_zz23:
|
||||
; ALL: ## BB#0:
|
||||
; ALL-NEXT: vxorpd %ymm1, %ymm1, %ymm1
|
||||
; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3]
|
||||
|
|
@ -286,8 +286,8 @@ define <4 x double> @vperm2z_0x18(<4 x double> %a) {
|
|||
ret <4 x double> %s
|
||||
}
|
||||
|
||||
define <4 x double> @vperm2z_0x28(<4 x double> %a) {
|
||||
; ALL-LABEL: vperm2z_0x28:
|
||||
define <4 x double> @shuffle_v4f64_zz45(<4 x double> %a) {
|
||||
; ALL-LABEL: shuffle_v4f64_zz45:
|
||||
; ALL: ## BB#0:
|
||||
; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm0[0,1]
|
||||
; ALL-NEXT: retq
|
||||
|
|
@ -295,8 +295,8 @@ define <4 x double> @vperm2z_0x28(<4 x double> %a) {
|
|||
ret <4 x double> %s
|
||||
}
|
||||
|
||||
define <4 x double> @vperm2z_0x38(<4 x double> %a) {
|
||||
; ALL-LABEL: vperm2z_0x38:
|
||||
define <4 x double> @shuffle_v4f64_zz67(<4 x double> %a) {
|
||||
; ALL-LABEL: shuffle_v4f64_zz67:
|
||||
; ALL: ## BB#0:
|
||||
; ALL-NEXT: vxorpd %ymm1, %ymm1, %ymm1
|
||||
; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3]
|
||||
|
|
@ -305,8 +305,8 @@ define <4 x double> @vperm2z_0x38(<4 x double> %a) {
|
|||
ret <4 x double> %s
|
||||
}
|
||||
|
||||
define <4 x double> @vperm2z_0x80(<4 x double> %a) {
|
||||
; ALL-LABEL: vperm2z_0x80:
|
||||
define <4 x double> @shuffle_v4f64_01zz(<4 x double> %a) {
|
||||
; ALL-LABEL: shuffle_v4f64_01zz:
|
||||
; ALL: ## BB#0:
|
||||
; ALL-NEXT: vxorpd %ymm1, %ymm1, %ymm1
|
||||
; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
|
||||
|
|
@ -315,8 +315,8 @@ define <4 x double> @vperm2z_0x80(<4 x double> %a) {
|
|||
ret <4 x double> %s
|
||||
}
|
||||
|
||||
define <4 x double> @vperm2z_0x81(<4 x double> %a) {
|
||||
; ALL-LABEL: vperm2z_0x81:
|
||||
define <4 x double> @shuffle_v4f64_23zz(<4 x double> %a) {
|
||||
; ALL-LABEL: shuffle_v4f64_23zz:
|
||||
; ALL: ## BB#0:
|
||||
; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero
|
||||
; ALL-NEXT: retq
|
||||
|
|
@ -324,8 +324,8 @@ define <4 x double> @vperm2z_0x81(<4 x double> %a) {
|
|||
ret <4 x double> %s
|
||||
}
|
||||
|
||||
define <4 x double> @vperm2z_0x82(<4 x double> %a) {
|
||||
; ALL-LABEL: vperm2z_0x82:
|
||||
define <4 x double> @shuffle_v4f64_45zz(<4 x double> %a) {
|
||||
; ALL-LABEL: shuffle_v4f64_45zz:
|
||||
; ALL: ## BB#0:
|
||||
; ALL-NEXT: vxorpd %ymm1, %ymm1, %ymm1
|
||||
; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
|
||||
|
|
@ -334,8 +334,8 @@ define <4 x double> @vperm2z_0x82(<4 x double> %a) {
|
|||
ret <4 x double> %s
|
||||
}
|
||||
|
||||
define <4 x double> @vperm2z_0x83(<4 x double> %a) {
|
||||
; ALL-LABEL: vperm2z_0x83:
|
||||
define <4 x double> @shuffle_v4f64_67zz(<4 x double> %a) {
|
||||
; ALL-LABEL: shuffle_v4f64_67zz:
|
||||
; ALL: ## BB#0:
|
||||
; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero
|
||||
; ALL-NEXT: retq
|
||||
|
|
@ -345,8 +345,8 @@ define <4 x double> @vperm2z_0x83(<4 x double> %a) {
|
|||
|
||||
;; With AVX2 select the integer version of the instruction. Use an add to force the domain selection.
|
||||
|
||||
define <4 x i64> @vperm2z_int_0x83(<4 x i64> %a, <4 x i64> %b) {
|
||||
; AVX1-LABEL: vperm2z_int_0x83:
|
||||
define <4 x i64> @shuffle_v4i64_67zz(<4 x i64> %a, <4 x i64> %b) {
|
||||
; AVX1-LABEL: shuffle_v4i64_67zz:
|
||||
; AVX1: ## BB#0:
|
||||
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero
|
||||
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
|
||||
|
|
@ -356,7 +356,7 @@ define <4 x i64> @vperm2z_int_0x83(<4 x i64> %a, <4 x i64> %b) {
|
|||
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: vperm2z_int_0x83:
|
||||
; AVX2-LABEL: shuffle_v4i64_67zz:
|
||||
; AVX2: ## BB#0:
|
||||
; AVX2-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero
|
||||
; AVX2-NEXT: vpaddq %ymm0, %ymm1, %ymm0
|
||||
|
|
|
|||
Loading…
Reference in New Issue