forked from OSchip/llvm-project
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@ -2532,7 +2532,7 @@ OperandTy: VirtReg, | VirtReg, UnsImm, VirtReg, SignExtImm PhysReg
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<div class="doc_text">
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<p>x86 has an feature which provides
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<p>x86 has a feature which provides
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the ability to perform loads and stores to different address spaces
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via the x86 segment registers. A segment override prefix byte on an
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instruction causes the instruction's memory access to go to the specified
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@ -633,7 +633,7 @@ it run faster:</p>
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</li>
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<li>X86 support for FS/GS relative loads and stores using <a
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href="CodeGenerator.html#x86_memory">address space 256/257</a> work reliably
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href="CodeGenerator.html#x86_memory">address space 256/257</a> works reliably
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now.</li>
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<li>LLVM 2.9 generates much better code in several cases by using adc/sbb to
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@ -644,7 +644,7 @@ it run faster:</p>
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shorten the height of instruction schedules without inducing register spills.
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</li>
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<li>The MC assembler support for 3dNow! and 3DNowA instructions.</li>
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<li>The MC assembler supports 3dNow! and 3DNowA instructions.</li>
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<li>Several bugs have been fixed for Windows x64 code generator.</li>
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</ul>
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