forked from OSchip/llvm-project
[FIX] Synthezise Sdiv/Srem/Udiv instructions correctly.
This patch simplifies the Sdiv/Srem/Udiv expansion and thereby prevents errors, e.g., regarding the insertion point. llvm-svn: 270408
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e6542002fc
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1a4ad8f771
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@ -246,15 +246,6 @@ private:
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const Region &R;
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ValueMapT *VMap;
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/// @brief Return the Value for @p E if it is not zero or else the value 1.
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Value *selectOneIfZero(const SCEV *E, Instruction *IP) {
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auto *Ty = E->getType();
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auto *RHS = Expander.expandCodeFor(E, Ty, IP);
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auto *Zero = ConstantInt::get(Ty, 0);
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auto *Cond = new ICmpInst(IP, ICmpInst::ICMP_NE, RHS, Zero);
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return SelectInst::Create(Cond, RHS, ConstantInt::get(Ty, 1), "", IP);
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}
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const SCEV *visitUnknown(const SCEVUnknown *E) {
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// If a value mapping was given try if the underlying value is remapped.
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@ -278,15 +269,14 @@ private:
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Instruction *StartIP = R.getEnteringBlock()->getTerminator();
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const SCEV *LHSScev = visit(SE.getSCEV(Inst->getOperand(0)));
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const SCEV *RHSScev = visit(SE.getSCEV(Inst->getOperand(1)));
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const SCEV *LHSScev = SE.getSCEV(Inst->getOperand(0));
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const SCEV *RHSScev = SE.getSCEV(Inst->getOperand(1));
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Value *LHS = Expander.expandCodeFor(LHSScev, E->getType(), StartIP);
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Value *RHS = nullptr;
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if (SE.isKnownNonZero(RHSScev))
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RHS = Expander.expandCodeFor(RHSScev, E->getType(), StartIP);
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else
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RHS = selectOneIfZero(RHSScev, StartIP);
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if (!SE.isKnownNonZero(RHSScev))
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RHSScev = SE.getUMaxExpr(RHSScev, SE.getConstant(E->getType(), 1));
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Value *LHS = expandCodeFor(LHSScev, E->getType(), StartIP);
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Value *RHS = expandCodeFor(RHSScev, E->getType(), StartIP);
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Inst = BinaryOperator::Create((Instruction::BinaryOps)Inst->getOpcode(),
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LHS, RHS, Inst->getName() + Name, StartIP);
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@ -308,12 +298,10 @@ private:
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return SE.getSignExtendExpr(visit(E->getOperand()), E->getType());
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}
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const SCEV *visitUDivExpr(const SCEVUDivExpr *E) {
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if (SE.isKnownNonZero(E->getRHS()))
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return SE.getUDivExpr(visit(E->getLHS()), visit(E->getRHS()));
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auto *RHSScev = visit(E->getRHS());
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auto *IP = R.getEnteringBlock()->getTerminator();
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auto *RHS = selectOneIfZero(RHSScev, IP);
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return SE.getUDivExpr(visit(E->getLHS()), SE.getSCEV(RHS));
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if (!SE.isKnownNonZero(E->getRHS()))
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RHSScev = SE.getUMaxExpr(RHSScev, SE.getConstant(E->getType(), 1));
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return SE.getUDivExpr(visit(E->getLHS()), RHSScev);
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}
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const SCEV *visitAddExpr(const SCEVAddExpr *E) {
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SmallVector<const SCEV *, 4> NewOps;
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@ -13,15 +13,15 @@
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; A[i] += A[(a / b) / (c / d)];
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; }
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;
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; IR: %[[R0:[0-9]*]] = icmp ne i32 %d, 0
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; IR-NEXT: %[[R1:[0-9]*]] = select i1 %[[R0]], i32 %d, i32 1
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; IR-NEXT: %[[R2:[0-9]*]] = udiv i32 %c, %[[R1]]
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; IR-NEXT: %[[R3:[0-9]*]] = icmp ne i32 %2, 0
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; IR-NEXT: %[[R4:[0-9]*]] = select i1 %[[R3]], i32 %[[R2]], i32 1
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; IR-NEXT: %[[R5:[0-9]*]] = icmp ne i32 %b, 0
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; IR-NEXT: %[[R6:[0-9]*]] = select i1 %[[R5]], i32 %b, i32 1
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; IR-NEXT: %[[R7:[0-9]*]] = udiv i32 %a, %[[R6]]
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; IR-NEXT: %[[R8:[0-9]*]] = udiv i32 %[[R7]], %[[R4]]
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; IR: %[[R0:[.a-zA-Z0-9]*]] = icmp ugt i32 %b, 1
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; IR-NEXT: %[[R1:[.a-zA-Z0-9]*]] = select i1 %[[R0]], i32 %b, i32 1
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; IR-NEXT: %[[R2:[.a-zA-Z0-9]*]] = udiv i32 %a, %[[R1]]
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; IR-NEXT: %[[R5:[.a-zA-Z0-9]*]] = icmp ugt i32 %d, 1
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; IR-NEXT: %[[R6:[.a-zA-Z0-9]*]] = select i1 %[[R5]], i32 %d, i32 1
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; IR-NEXT: %[[R7:[.a-zA-Z0-9]*]] = udiv i32 %c, %[[R6]]
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; IR-NEXT: %[[R3:[.a-zA-Z0-9]*]] = icmp ugt i32 %[[R7]], 1
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; IR-NEXT: %[[R4:[.a-zA-Z0-9]*]] = select i1 %[[R3]], i32 %[[R7]], i32 1
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; IR-NEXT: %[[R8:[.a-zA-Z0-9]*]] = udiv i32 %[[R2]], %[[R4]]
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@ -0,0 +1,58 @@
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; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s
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;
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; Verify we do not crash when we synthezise code for the udiv in the SCoP.
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;
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; CHECK: polly.start
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; Function Attrs: nounwind uwtable
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define void @RestartModel() #0 {
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entry:
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br label %for.cond32.preheader
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for.cond32.preheader: ; preds = %entry, %for.body50.7
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%i.13 = phi i32 [ 0, %entry ], [ %inc60, %for.body50.7 ]
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%add = add i32 %i.13, 2
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%div44 = udiv i32 undef, %add
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%sub45 = sub i32 16384, %div44
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%conv46 = trunc i32 %sub45 to i16
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br label %for.body35
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for.body35: ; preds = %for.cond32.preheader
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br label %for.body50
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for.body50: ; preds = %for.body35
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br label %for.body50.1
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for.cond62: ; preds = %for.body50.7
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%conv46.lcssa = phi i16 [ %conv46, %for.body50.7 ]
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store i16 %conv46.lcssa, i16* undef, align 2
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br label %for.end83
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for.end83: ; preds = %for.cond62
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ret void
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for.body50.1: ; preds = %for.body50
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br label %for.body50.2
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for.body50.2: ; preds = %for.body50.1
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br label %for.body50.3
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for.body50.3: ; preds = %for.body50.2
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br label %for.body50.4
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for.body50.4: ; preds = %for.body50.3
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br label %for.body50.5
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for.body50.5: ; preds = %for.body50.4
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br label %for.body50.6
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for.body50.6: ; preds = %for.body50.5
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br label %for.body50.7
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for.body50.7: ; preds = %for.body50.6
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%inc60 = add i32 %i.13, 1
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%cmp29 = icmp ult i32 %inc60, 128
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br i1 %cmp29, label %for.cond32.preheader, label %for.cond62
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}
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