forked from OSchip/llvm-project
A single MachineInstr operand may now be both a def and a use,
so additional dep. edges have to be added. This was needed to correctly handle conditional move instructions! MachineCodeForBasicBlock is now an annotation on BasicBlock. Renamed "earliestForNode" to "earliestReadyTimeForNode". llvm-svn: 2826
This commit is contained in:
parent
ae219e24ba
commit
19c55db0d9
llvm/lib/CodeGen/InstrSched
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@ -8,6 +8,7 @@
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#include "SchedPriorities.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
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#include "llvm/CodeGen/MachineCodeForMethod.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
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#include "llvm/Target/TargetMachine.h"
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@ -631,7 +632,7 @@ AssignInstructionsToSlots(class SchedulingManager& S, unsigned maxIssue)
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static void
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RecordSchedule(const BasicBlock* bb, const SchedulingManager& S)
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{
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MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec();
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MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb);
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const MachineInstrInfo& mii = S.schedInfo.getInstrInfo();
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#ifndef NDEBUG
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@ -1220,7 +1221,7 @@ ReplaceNopsWithUsefulInstr(SchedulingManager& S,
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// fill delay slots, otherwise, just discard them.
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//
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unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1;
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MachineCodeForBasicBlock& bbMvec = node->getBB()->getMachineInstrVec();
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MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(node->getBB());
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assert(bbMvec[firstDelaySlotIdx - 1] == brInstr &&
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"Incorrect instr. index in basic block for brInstr");
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@ -1313,7 +1314,7 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S,
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// Simply passing in an empty delayNodeVec will have this effect.
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//
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delayNodeVec.clear();
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const MachineCodeForBasicBlock& bbMvec = bb->getMachineInstrVec();
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const MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(bb);
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for (unsigned i=0; i < bbMvec.size(); i++)
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if (bbMvec[i] != brInstr &&
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mii.getNumDelaySlots(bbMvec[i]->getOpCode()) > 0)
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@ -15,6 +15,7 @@
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#include "SchedGraph.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/BasicBlock.h"
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@ -393,7 +394,7 @@ SchedGraph::addCDEdges(const TerminatorInst* term,
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// all preceding instructions in the basic block. Use 0 latency again.
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//
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const BasicBlock* bb = firstBrNode->getBB();
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const MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec();
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const MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb);
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for (unsigned i=0, N=mvec.size(); i < N; i++)
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{
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if (mvec[i] == termMvec[first]) // reached the first branch
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@ -550,7 +551,9 @@ SchedGraph::addMachineRegEdges(RegToRefVecMap& regToRefVecMap,
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SchedGraphNode* node = regRefVec[i].first;
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unsigned int opNum = regRefVec[i].second;
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bool isDef = node->getMachineInstr()->operandIsDefined(opNum);
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bool isDefAndUse =
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node->getMachineInstr()->operandIsDefinedAndUsed(opNum);
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for (unsigned p=0; p < i; ++p)
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{
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SchedGraphNode* prevNode = regRefVec[p].first;
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@ -559,14 +562,22 @@ SchedGraph::addMachineRegEdges(RegToRefVecMap& regToRefVecMap,
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unsigned int prevOpNum = regRefVec[p].second;
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bool prevIsDef =
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prevNode->getMachineInstr()->operandIsDefined(prevOpNum);
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bool prevIsDefAndUse =
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prevNode->getMachineInstr()->operandIsDefinedAndUsed(prevOpNum);
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if (isDef)
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new SchedGraphEdge(prevNode, node, regNum,
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(prevIsDef)? SchedGraphEdge::OutputDep
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: SchedGraphEdge::AntiDep);
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else if (prevIsDef)
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new SchedGraphEdge(prevNode, node, regNum,
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SchedGraphEdge::TrueDep);
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{
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if (prevIsDef)
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new SchedGraphEdge(prevNode, node, regNum,
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SchedGraphEdge::OutputDep);
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if (!prevIsDef || prevIsDefAndUse)
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new SchedGraphEdge(prevNode, node, regNum,
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SchedGraphEdge::AntiDep);
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}
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if (prevIsDef)
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if (!isDef || isDefAndUse)
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new SchedGraphEdge(prevNode, node, regNum,
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SchedGraphEdge::TrueDep);
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}
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}
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}
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@ -574,13 +585,20 @@ SchedGraph::addMachineRegEdges(RegToRefVecMap& regToRefVecMap,
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}
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// Adds dependences to/from refNode from/to all other defs
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// in the basic block. refNode may be a use, a def, or both.
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// We do not consider other uses because we are not building use-use deps.
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//
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void
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SchedGraph::addEdgesForValue(SchedGraphNode* refNode,
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const RefVec& defVec,
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const Value* defValue,
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bool refNodeIsDef,
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bool refNodeIsDefAndUse,
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const TargetMachine& target)
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{
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bool refNodeIsUse = !refNodeIsDef || refNodeIsDefAndUse;
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// Add true or output dep edges from all def nodes before refNode in BB.
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// Add anti or output dep edges to all def nodes after refNode.
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for (RefVec::const_iterator I=defVec.begin(), E=defVec.end(); I != E; ++I)
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@ -589,15 +607,23 @@ SchedGraph::addEdgesForValue(SchedGraphNode* refNode,
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continue; // Dont add any self-loops
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if ((*I).first->getOrigIndexInBB() < refNode->getOrigIndexInBB())
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// (*).first is before refNode
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(void) new SchedGraphEdge((*I).first, refNode, defValue,
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(refNodeIsDef)? SchedGraphEdge::OutputDep
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: SchedGraphEdge::TrueDep);
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{ // (*).first is before refNode
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if (refNodeIsDef)
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(void) new SchedGraphEdge((*I).first, refNode, defValue,
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SchedGraphEdge::OutputDep);
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if (refNodeIsUse)
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(void) new SchedGraphEdge((*I).first, refNode, defValue,
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SchedGraphEdge::TrueDep);
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}
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else
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// (*).first is after refNode
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(void) new SchedGraphEdge(refNode, (*I).first, defValue,
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(refNodeIsDef)? SchedGraphEdge::OutputDep
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: SchedGraphEdge::AntiDep);
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{ // (*).first is after refNode
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if (refNodeIsDef)
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(void) new SchedGraphEdge(refNode, (*I).first, defValue,
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SchedGraphEdge::OutputDep);
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if (refNodeIsUse)
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(void) new SchedGraphEdge(refNode, (*I).first, defValue,
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SchedGraphEdge::AntiDep);
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}
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}
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}
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@ -626,7 +652,8 @@ SchedGraph::addEdgesForInstruction(const MachineInstr& minstr,
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ValueToDefVecMap::const_iterator I = valueToDefVecMap.find(srcI);
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if (I != valueToDefVecMap.end())
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addEdgesForValue(node, (*I).second, mop.getVRegValue(),
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minstr.operandIsDefined(i), target);
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minstr.operandIsDefined(i),
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minstr.operandIsDefinedAndUsed(i), target);
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}
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break;
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@ -649,73 +676,20 @@ SchedGraph::addEdgesForInstruction(const MachineInstr& minstr,
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// value of a Ret instruction.
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//
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for (unsigned i=0, N=minstr.getNumImplicitRefs(); i < N; ++i)
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if (! minstr.implicitRefIsDefined(i))
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if (! minstr.implicitRefIsDefined(i) ||
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minstr.implicitRefIsDefinedAndUsed(i))
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if (const Instruction* srcI =
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dyn_cast_or_null<Instruction>(minstr.getImplicitRef(i)))
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{
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ValueToDefVecMap::const_iterator I = valueToDefVecMap.find(srcI);
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if (I != valueToDefVecMap.end())
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addEdgesForValue(node, (*I).second, minstr.getImplicitRef(i),
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minstr.implicitRefIsDefined(i), target);
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minstr.implicitRefIsDefined(i),
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minstr.implicitRefIsDefinedAndUsed(i), target);
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}
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}
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#undef NEED_SEPARATE_NONSSA_EDGES_CODE
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#ifdef NEED_SEPARATE_NONSSA_EDGES_CODE
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void
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SchedGraph::addNonSSAEdgesForValue(const Instruction* instr,
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const TargetMachine& target)
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{
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if (isa<PHINode>(instr))
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return;
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MachineCodeForVMInstr& mvec = instr->getMachineInstrVec();
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const MachineInstrInfo& mii = target.getInstrInfo();
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RefVec refVec;
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for (unsigned i=0, N=mvec.size(); i < N; i++)
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for (int o=0, N = mii.getNumOperands(mvec[i]->getOpCode()); o < N; o++)
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{
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const MachineOperand& mop = mvec[i]->getOperand(o);
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if ((mop.getOperandType() == MachineOperand::MO_VirtualRegister ||
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mop.getOperandType() == MachineOperand::MO_CCRegister)
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&& mop.getVRegValue() == (Value*) instr)
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{
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// this operand is a definition or use of value `instr'
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SchedGraphNode* node = this->getGraphNodeForInstr(mvec[i]);
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assert(node && "No node for machine instruction in this BB?");
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refVec.push_back(std::make_pair(node, o));
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}
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}
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// refVec is ordered by control flow order of the machine instructions
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for (unsigned i=0; i < refVec.size(); ++i)
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{
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SchedGraphNode* node = refVec[i].first;
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unsigned int opNum = refVec[i].second;
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bool isDef = node->getMachineInstr()->operandIsDefined(opNum);
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if (isDef)
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// add output and/or anti deps to this definition
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for (unsigned p=0; p < i; ++p)
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{
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SchedGraphNode* prevNode = refVec[p].first;
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if (prevNode != node)
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{
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bool prevIsDef = prevNode->getMachineInstr()->
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operandIsDefined(refVec[p].second);
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new SchedGraphEdge(prevNode, node, SchedGraphEdge::ValueDep,
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(prevIsDef)? SchedGraphEdge::OutputDep
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: SchedGraphEdge::AntiDep);
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}
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}
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}
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}
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#endif //NEED_SEPARATE_NONSSA_EDGES_CODE
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void
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SchedGraph::findDefUseInfoAtInstr(const TargetMachine& target,
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SchedGraphNode* node,
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// Build graph nodes for each VM instruction and gather def/use info.
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// Do both those together in a single pass over all machine instructions.
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const MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec();
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const MachineCodeForBasicBlock& mvec = MachineCodeForBasicBlock::get(bb);
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for (unsigned i=0; i < mvec.size(); i++)
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if (! mii.isDummyPhiInstr(mvec[i]->getOpCode()))
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{
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@ -822,7 +796,7 @@ SchedGraph::buildNodesforBB(const TargetMachine& target,
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// Find the machine instruction that makes a copy of inval to (*PI).
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// This must be in the current basic block (bb).
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const MachineCodeForVMInstr& mvec = (*PI)->getMachineInstrVec();
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const MachineCodeForVMInstr& mvec = MachineCodeForBasicBlock::get(*PI);
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const MachineInstr* theCopy = NULL;
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for (unsigned i=0; i < mvec.size() && theCopy == NULL; i++)
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if (! mii.isDummyPhiInstr(mvec[i]->getOpCode()))
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@ -830,13 +804,17 @@ SchedGraph::buildNodesforBB(const TargetMachine& target,
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for (int o=0, N=(int) mvec[i]->getNumOperands(); o < N; o++)
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{
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const MachineOperand& mop = mvec[i]->getOperand(o);
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if (mvec[i]->operandIsDefined(o))
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assert(mop.getVRegValue() == (*PI) && "dest shd be my Phi");
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else if (mop.getVRegValue() == inVal)
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{ // found the copy!
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theCopy = mvec[i];
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break;
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}
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if (! mvec[i]->operandIsDefined(o) ||
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NOT NEEDED? mvec[i]->operandIsDefinedAndUsed(o))
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if (mop.getVRegValue() == inVal)
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{ // found the copy!
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theCopy = mvec[i];
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break;
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}
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}
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// Found the dang instruction. Now create a node and do the rest...
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@ -911,7 +889,7 @@ SchedGraph::buildGraph(const TargetMachine& target)
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//
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//----------------------------------------------------------------
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MachineCodeForBasicBlock& bbMvec = bb->getMachineInstrVec();
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MachineCodeForBasicBlock& bbMvec = MachineCodeForBasicBlock::get(bb);
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// First, add edges to the terminator instruction of the basic block.
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this->addCDEdges(bb->getTerminator(), target);
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@ -327,6 +327,7 @@ private:
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const RefVec& defVec,
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const Value* defValue,
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bool refNodeIsDef,
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bool refNodeIsDefAndUse,
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const TargetMachine& target);
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void addDummyEdges ();
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@ -28,9 +28,10 @@ SchedPriorities::SchedPriorities(const Function *, const SchedGraph *G,
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FunctionLiveVarInfo &LVI)
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: curTime(0), graph(G), methodLiveVarInfo(LVI),
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nodeDelayVec(G->getNumNodes(), INVALID_LATENCY), // make errors obvious
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earliestForNode(G->getNumNodes(), 0),
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earliestReadyTimeForNode(G->getNumNodes(), 0),
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earliestReadyTime(0),
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nextToTry(candsAsHeap.begin()) {
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nextToTry(candsAsHeap.begin())
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{
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computeDelays(graph);
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}
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@ -51,7 +52,7 @@ SchedPriorities::computeDelays(const SchedGraph* graph)
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const SchedGraphNode* node = *poIter;
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cycles_t nodeDelay;
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if (node->beginOutEdges() == node->endOutEdges())
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nodeDelay = node->getLatency();
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nodeDelay = node->getLatency();
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else
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{
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// Iterate over the out-edges of the node to compute delay
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@ -59,7 +60,7 @@ SchedPriorities::computeDelays(const SchedGraph* graph)
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for (SchedGraphNode::const_iterator E=node->beginOutEdges();
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E != node->endOutEdges(); ++E)
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{
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cycles_t sinkDelay = getNodeDelayRef((*E)->getSink());
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cycles_t sinkDelay = getNodeDelay((*E)->getSink());
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nodeDelay = std::max(nodeDelay, sinkDelay + (*E)->getMinDelay());
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}
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}
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@ -104,13 +105,13 @@ SchedPriorities::insertReady(const SchedGraphNode* node)
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candsAsSet.insert(node);
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mcands.clear(); // ensure reset choices is called before any more choices
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earliestReadyTime = std::min(earliestReadyTime,
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earliestForNode[node->getNodeId()]);
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getEarliestReadyTimeForNode(node));
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if (SchedDebugLevel >= Sched_PrintSchedTrace)
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{
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cerr << " Node " << node->getNodeId() << " will be ready in Cycle "
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<< earliestForNode[node->getNodeId()] << "; "
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<< " Delay = " <<(long)getNodeDelayRef(node) << "; Instruction: \n";
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<< getEarliestReadyTimeForNode(node) << "; "
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<< " Delay = " <<(long)getNodeDelay(node) << "; Instruction: \n";
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cerr << " " << *node->getMachineInstr() << "\n";
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}
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}
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@ -123,21 +124,21 @@ SchedPriorities::issuedReadyNodeAt(cycles_t curTime,
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candsAsSet.erase(node);
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mcands.clear(); // ensure reset choices is called before any more choices
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if (earliestReadyTime == getEarliestForNodeRef(node))
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if (earliestReadyTime == getEarliestReadyTimeForNode(node))
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{// earliestReadyTime may have been due to this node, so recompute it
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earliestReadyTime = HUGE_LATENCY;
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for (NodeHeap::const_iterator I=candsAsHeap.begin();
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I != candsAsHeap.end(); ++I)
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if (candsAsHeap.getNode(I))
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earliestReadyTime = std::min(earliestReadyTime,
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getEarliestForNodeRef(candsAsHeap.getNode(I)));
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getEarliestReadyTimeForNode(candsAsHeap.getNode(I)));
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}
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// Now update ready times for successors
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for (SchedGraphNode::const_iterator E=node->beginOutEdges();
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E != node->endOutEdges(); ++E)
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{
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cycles_t& etime = getEarliestForNodeRef((*E)->getSink());
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cycles_t& etime = getEarliestReadyTimeForNodeRef((*E)->getSink());
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etime = std::max(etime, curTime + (*E)->getMinDelay());
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}
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}
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@ -216,7 +217,7 @@ SchedPriorities::getNextHighest(const SchedulingManager& S,
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// If not, remove it from mcands and continue. Refill mcands if
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// it becomes empty.
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nextChoice = candsAsHeap.getNode(mcands[nextIdx]);
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if (getEarliestForNodeRef(nextChoice) > curTime
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if (getEarliestReadyTimeForNode(nextChoice) > curTime
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|| ! instrIsFeasible(S, nextChoice->getMachineInstr()->getOpCode()))
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{
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mcands.erase(mcands.begin() + nextIdx);
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|
|
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@ -159,7 +159,8 @@ private:
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FunctionLiveVarInfo &methodLiveVarInfo;
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std::hash_map<const MachineInstr*, bool> lastUseMap;
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std::vector<cycles_t> nodeDelayVec;
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std::vector<cycles_t> earliestForNode;
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std::vector<cycles_t> nodeEarliestUseVec;
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std::vector<cycles_t> earliestReadyTimeForNode;
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cycles_t earliestReadyTime;
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NodeHeap candsAsHeap; // candidate nodes, ready to go
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std::hash_set<const SchedGraphNode*> candsAsSet;//same entries as candsAsHeap,
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@ -183,14 +184,21 @@ private:
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const SchedGraphNode* graphNode);
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// NOTE: The next two return references to the actual vector entries.
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// Use with care.
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// Use the following two if you don't need to modify the value.
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cycles_t& getNodeDelayRef (const SchedGraphNode* node) {
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assert(node->getNodeId() < nodeDelayVec.size());
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return nodeDelayVec[node->getNodeId()];
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}
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cycles_t& getEarliestForNodeRef (const SchedGraphNode* node) {
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assert(node->getNodeId() < earliestForNode.size());
|
||||
return earliestForNode[node->getNodeId()];
|
||||
cycles_t& getEarliestReadyTimeForNodeRef (const SchedGraphNode* node) {
|
||||
assert(node->getNodeId() < earliestReadyTimeForNode.size());
|
||||
return earliestReadyTimeForNode[node->getNodeId()];
|
||||
}
|
||||
|
||||
cycles_t getNodeDelay (const SchedGraphNode* node) const {
|
||||
return ((SchedPriorities*) this)->getNodeDelayRef(node);
|
||||
}
|
||||
cycles_t getEarliestReadyTimeForNode(const SchedGraphNode* node) const {
|
||||
return ((SchedPriorities*) this)->getEarliestReadyTimeForNodeRef(node);
|
||||
}
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue