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Revert two bad commits. 

Summary: I forgot to squash git commits before doing an svn dcommit of D12219. Reverting, and re-submitting.

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D12298

llvm-svn: 245886
This commit is contained in:
JF Bastien 2015-08-24 22:07:33 +00:00
parent 5cd113df01
commit 19c2e6634d
9 changed files with 28 additions and 101 deletions
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13
llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
View File

@ -44,16 +44,3 @@ void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
printInstruction(MI, OS);
printAnnotation(OS, Annot);
}
void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg())
O << getRegisterName(Op.getReg());
else if (Op.isImm())
O << '#' << Op.getImm();
else {
assert(Op.isExpr() && "unknown operand kind in printOperand");
Op.getExpr()->print(O, &MAI);
}
}

3
llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h
View File

@ -32,9 +32,6 @@ public:
void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
const MCSubtargetInfo &STI) override;
// Used by tblegen code.
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo);

1
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
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@ -85,7 +85,6 @@ static SmallString<32> Name(const WebAssemblyInstrInfo *TII,
}
void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
SmallString<128> Str;
raw_svector_ostream OS(Str);

19
llvm/lib/Target/WebAssembly/WebAssemblyISD.def
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@ -1,19 +0,0 @@
//- WebAssemblyISD.def - WebAssembly ISD ---------------------------*- C++ -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file describes the various WebAssembly ISD node types.
///
//===----------------------------------------------------------------------===//
// NOTE: NO INCLUDE GUARD DESIRED!
HANDLE_NODETYPE(CALL)
HANDLE_NODETYPE(RETURN)
HANDLE_NODETYPE(ARGUMENT)

40
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
View File

@ -19,7 +19,6 @@
#include "WebAssemblyTargetMachine.h"
#include "WebAssemblyTargetObjectFile.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/DiagnosticInfo.h"
@ -165,13 +164,9 @@ MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
const char *
WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
case WebAssemblyISD::FIRST_NUMBER:
break;
#define HANDLE_NODETYPE(NODE) \
case WebAssemblyISD::NODE: \
return "WebAssemblyISD::" #NODE;
#include "WebAssemblyISD.def"
#undef HANDLE_NODETYPE
case WebAssemblyISD::FIRST_NUMBER: break;
case WebAssemblyISD::RETURN: return "WebAssemblyISD::RETURN";
case WebAssemblyISD::ARGUMENT: return "WebAssemblyISD::ARGUMENT";
}
return nullptr;
}
@ -190,6 +185,7 @@ static void fail(SDLoc DL, SelectionDAG &DAG, const char *msg) {
DiagnosticInfoUnsupported(DL, *MF.getFunction(), msg, SDValue()));
}
<<<<<<< HEAD
SDValue
WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
SmallVectorImpl<SDValue> &InVals) const {
@ -209,6 +205,7 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
Type *retTy = CLI.RetTy;
bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet();
if (IsStructRet)
fail(DL, DAG, "WebAssembly doesn't support struct return yet");
@ -216,6 +213,7 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
fail(DL, DAG, "WebAssembly doesn't support more than 1 returned value yet");
SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
ArgListTy &Args = CLI.getArgs();
bool IsVarArg = CLI.IsVarArg;
if (IsVarArg)
fail(DL, DAG, "WebAssembly doesn't support varargs yet");
@ -225,33 +223,33 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
unsigned NumBytes = CCInfo.getNextStackOffset();
auto PtrVT = getPointerTy(MF.getDataLayout());
auto Zero = DAG.getConstant(0, DL, PtrVT, true);
auto NB = DAG.getConstant(NumBytes, DL, PtrVT, true);
Chain = DAG.getCALLSEQ_START(Chain, NB, DL);
auto Zero = DAG.getConstant(0, CLI.DL, PtrVT, true);
auto NB = DAG.getConstant(NumBytes, CLI.DL, PtrVT, true);
Chain = DAG.getCALLSEQ_START(Chain, NB, CLI.DL);
SmallVector<SDValue, 16> Ops;
Ops.push_back(Chain);
Ops.push_back(Callee);
Ops.append(OutVals.begin(), OutVals.end());
Ops.push_back(CLI.Callee);
Ops.append(CLI.OutVals.begin(), CLI.OutVals.end());
SmallVector<EVT, 8> Tys;
for (const auto &In : Ins)
for (const auto &In : CLI.Ins)
Tys.push_back(In.VT);
Tys.push_back(MVT::Other);
SDVTList TyList = DAG.getVTList(Tys);
SDValue Res = DAG.getNode(WebAssemblyISD::CALL, DL, TyList, Ops);
if (!Ins.empty()) {
InVals.push_back(Res);
Chain = Res.getValue(1);
}
SDVTList TyList = CLI.DAG.getVTList(Tys);
SDValue Res = CLI.DAG.getNode(WebAssemblyISD::CALL, CLI.DL, TyList, Ops);
InVals.push_back(Res);
Chain = Res.getValue(1);
// FIXME: handle CLI.RetSExt and CLI.RetZExt?
Chain = DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), DL);
Chain = CLI.DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), CLI.DL);
return Chain;
}
=======
>>>>>>> parent of 03685a9... call
bool WebAssemblyTargetLowering::CanLowerReturn(
CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {

9
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
View File

@ -24,9 +24,9 @@ namespace WebAssemblyISD {
enum NodeType : unsigned {
FIRST_NUMBER = ISD::BUILTIN_OP_END,
#define HANDLE_NODETYPE(NODE) NODE,
#include "WebAssemblyISD.def"
#undef HANDLE_NODETYPE
RETURN,
ARGUMENT,
// add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
};
@ -52,9 +52,6 @@ private:
const char *getTargetNodeName(unsigned Opcode) const override;
SDValue LowerCall(CallLoweringInfo &CLI,
SmallVectorImpl<SDValue> &InVals) const override;
bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
bool isVarArg,
const SmallVectorImpl<ISD::OutputArg> &Outs,

23
llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
View File

@ -12,29 +12,6 @@
///
//===----------------------------------------------------------------------===//
// The call sequence start/end LLVM-isms isn't useful to WebAssembly since it's
// a virtual ISA.
// FIXME make noop?
//def : Pat<(WebAssemblycallseq_start timm), (i32 (IMPLICIT_DEF))>;
//def : Pat<(WebAssemblycallseq_end timm, timm), (i32 (IMPLICIT_DEF))>;
def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>;
def SDT_WebAssemblyCallSeqEnd :
SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
def WebAssemblycallseq_start :
SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart,
[SDNPHasChain, SDNPOutGlue]>;
def WebAssemblycallseq_end :
SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd,
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
def : Pseudo<(outs), (ins i64imm:$amt),
[(WebAssemblycallseq_start timm:$amt)],
"#ADJCALLSTACKDOWN $amt">;
def : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
[(WebAssemblycallseq_end timm:$amt1, timm:$amt2)],
"#ADJCALLSTACKUP $amt1 $amt2">;
/*
* TODO(jfb): Add the following.
*

12
llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
View File

@ -12,7 +12,7 @@
///
//===----------------------------------------------------------------------===//
// WebAssembly Instruction Format.
// WebAssembly Instruction Format
class WebAssemblyInst<string cstr> : Instruction {
field bits<0> Inst; // Instruction encoding.
let Namespace = "WebAssembly";
@ -20,7 +20,7 @@ class WebAssemblyInst<string cstr> : Instruction {
let Constraints = cstr;
}
// Normal instructions.
// Normal instructions
class I<dag oops, dag iops, list<dag> pattern, string cstr = "">
: WebAssemblyInst<cstr> {
dag OutOperandList = oops;
@ -28,14 +28,6 @@ class I<dag oops, dag iops, list<dag> pattern, string cstr = "">
let Pattern = pattern;
}
// Pseudo instructions.
class Pseudo<dag oops, dag iops, list<dag> pattern, string asmstr,
string cstr = "">
: I<oops, iops, pattern, cstr> {
let isPseudo = 1;
let AsmString = asmstr;
}
// Unary and binary instructions, for the local types that WebAssembly supports.
multiclass UnaryInt<SDNode node> {
def _I32 : I<(outs Int32:$dst), (ins Int32:$src),

9
llvm/test/CodeGen/WebAssembly/call.ll
View File

@ -5,14 +5,13 @@
target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare void @void_nullary()
declare void @int32_nullary()
declare void @nullary()
; CHECK-LABEL: call_void_nullary:
; CHECK-LABEL: call_nullary:
; CHECK-NEXT: (call @foo)
; CHECK-NEXT: (return)
define void @call_void_nullary() {
call void @void_nullary()
define void @call_nullary() {
call void @nullary()
ret void
}