From 1992e30c2d751f6f1f6ad5190f84e37dece04f7f Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Thu, 15 Oct 2020 21:18:22 +0000 Subject: [PATCH] [WebAssembly] Prototype i8x16.popcnt As proposed at https://github.com/WebAssembly/simd/pull/379. Use a target builtin and intrinsic rather than normal codegen patterns to make the instruction opt-in until it is merged to the proposal and stabilized in engines. Differential Revision: https://reviews.llvm.org/D89446 --- clang/include/clang/Basic/BuiltinsWebAssembly.def | 2 ++ clang/lib/CodeGen/CGBuiltin.cpp | 5 +++++ clang/test/CodeGen/builtins-wasm.c | 6 ++++++ llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 5 +++++ llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 3 +++ llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 10 ++++++++++ llvm/test/MC/WebAssembly/simd-encodings.s | 3 +++ 7 files changed, 34 insertions(+) diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def index 86348ff5fea7..f84ce92ffe7e 100644 --- a/clang/include/clang/Basic/BuiltinsWebAssembly.def +++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -114,6 +114,8 @@ TARGET_BUILTIN(__builtin_wasm_max_u_i32x4, "V4UiV4UiV4Ui", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16UcV16UcV16Uc", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8UsV8UsV8Us", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_popcnt_i8x16, "V16ScV16Sc", "nc", "simd128") + TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i8x16, "V8sV8sV8s", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128") diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 3f6977e16c4a..884fa1103163 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -16606,6 +16606,11 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_dot); return Builder.CreateCall(Callee, {LHS, RHS}); } + case WebAssembly::BI__builtin_wasm_popcnt_i8x16: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt); + return Builder.CreateCall(Callee, {Vec}); + } case WebAssembly::BI__builtin_wasm_any_true_i8x16: case WebAssembly::BI__builtin_wasm_any_true_i16x8: case WebAssembly::BI__builtin_wasm_any_true_i32x4: diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c index d7e998fb997b..4b882700e3ac 100644 --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -538,6 +538,12 @@ i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) { // WEBASSEMBLY-NEXT: ret } +i8x16 popcnt(i8x16 x) { + return __builtin_wasm_popcnt_i8x16(x); + // WEBASSEMBLY: call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x) + // WEBASSEMBLY-NEXT: ret +} + int any_true_i8x16(i8x16 x) { return __builtin_wasm_any_true_i8x16(x); // WEBASSEMBLY: call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x) diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td index 8298312491fa..7a701ec0e269 100644 --- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td +++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td @@ -254,6 +254,11 @@ def int_wasm_store64_lane : [IntrWriteMem, IntrArgMemOnly], "", [SDNPMemOperand]>; +// TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged +// to the proposal. +def int_wasm_popcnt : + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem, IntrSpeculatable]>; + //===----------------------------------------------------------------------===// // Thread-local storage intrinsics //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index ad3a756dc55b..5d72def798fd 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -785,6 +785,9 @@ defm ANYTRUE : SIMDReduce; // All lanes true: all_true defm ALLTRUE : SIMDReduce; +// Population count: popcnt +defm POPCNT : SIMDUnary; + // Reductions already return 0 or 1, so and 1, setne 0, and seteq 1 // can be folded out foreach reduction = diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll index 39b59227a8be..7c0f43d2c67f 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -75,6 +75,16 @@ define <16 x i8> @avgr_u_v16i8(<16 x i8> %x, <16 x i8> %y) { ret <16 x i8> %a } +; CHECK-LABEL: popcnt_v16i8: +; SIMD128-NEXT: .functype popcnt_v16i8 (v128) -> (v128){{$}} +; SIMD128-NEXT: i8x16.popcnt $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <16 x i8> @llvm.wasm.popcnt(<16 x i8>) +define <16 x i8> @popcnt_v16i8(<16 x i8> %x) { + %a = call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x) + ret <16 x i8> %a +} + ; CHECK-LABEL: any_v16i8: ; SIMD128-NEXT: .functype any_v16i8 (v128) -> (i32){{$}} ; SIMD128-NEXT: i8x16.any_true $push[[R:[0-9]+]]=, $0{{$}} diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s index f18a4f196d68..2b737b434f61 100644 --- a/llvm/test/MC/WebAssembly/simd-encodings.s +++ b/llvm/test/MC/WebAssembly/simd-encodings.s @@ -367,6 +367,9 @@ main: # CHECK: i8x16.avgr_u # encoding: [0xfd,0x7b] i8x16.avgr_u + # CHECK: i8x16.popcnt # encoding: [0xfd,0x7c] + i8x16.popcnt + # CHECK: i16x8.abs # encoding: [0xfd,0x80,0x01] i16x8.abs