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In MipsRegisterInfo::eliminateFrameIndex, call Mips::loadImmediate 

to load an immediate that does not fit into 16-bit. 

llvm-svn: 158431
This commit is contained in:
Akira Hatanaka 2012-06-14 01:17:36 +00:00
parent 2372c8bb5f
commit 194a8773ea
1 changed files with 7 additions and 25 deletions
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32
llvm/lib/Target/Mips/MipsRegisterInfo.cpp
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@ -16,6 +16,7 @@
#include "MipsRegisterInfo.h"
#include "Mips.h"
#include "MipsAnalyzeImmediate.h"
#include "MipsInstrInfo.h"
#include "MipsSubtarget.h"
#include "MipsMachineFunction.h"
#include "llvm/Constants.h"
@ -211,7 +212,8 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
// incoming argument, callee-saved register location or local variable.
int64_t Offset;
if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isDynAllocFI(FrameIndex))
if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isDynAllocFI(FrameIndex) ||
MipsFI->isGlobalRegFI(FrameIndex))
Offset = spOffset;
else
Offset = spOffset + (int64_t)stackSize;
@ -225,37 +227,17 @@ eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
if (!MI.isDebugValue() && !isInt<16>(Offset)) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = II->getDebugLoc();
MipsAnalyzeImmediate AnalyzeImm;
unsigned Size = Subtarget.isABI_N64() ? 64 : 32;
unsigned LUi = Subtarget.isABI_N64() ? Mips::LUi64 : Mips::LUi;
unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
unsigned ZEROReg = Subtarget.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
unsigned ATReg = Subtarget.isABI_N64() ? Mips::AT_64 : Mips::AT;
const MipsAnalyzeImmediate::InstSeq &Seq =
AnalyzeImm.Analyze(Offset, Size, true /* LastInstrIsADDiu */);
MipsAnalyzeImmediate::InstSeq::const_iterator Inst = Seq.begin();
MipsAnalyzeImmediate::Inst LastInst(0, 0);
MipsFI->setEmitNOAT();
// The first instruction can be a LUi, which is different from other
// instructions (ADDiu, ORI and SLL) in that it does not have a register
// operand.
if (Inst->Opc == LUi)
BuildMI(MBB, II, DL, TII.get(LUi), ATReg)
.addImm(SignExtend64<16>(Inst->ImmOpnd));
else
BuildMI(MBB, II, DL, TII.get(Inst->Opc), ATReg).addReg(ZEROReg)
.addImm(SignExtend64<16>(Inst->ImmOpnd));
// Build the remaining instructions in Seq except for the last one.
for (++Inst; Inst != Seq.end() - 1; ++Inst)
BuildMI(MBB, II, DL, TII.get(Inst->Opc), ATReg).addReg(ATReg)
.addImm(SignExtend64<16>(Inst->ImmOpnd));
Mips::loadImmediate(Offset, Subtarget.isABI_N64(), TII, MBB, II, DL, true,
&LastInst);
BuildMI(MBB, II, DL, TII.get(ADDu), ATReg).addReg(FrameReg).addReg(ATReg);
FrameReg = ATReg;
Offset = SignExtend64<16>(Inst->ImmOpnd);
Offset = SignExtend64<16>(LastInst.ImmOpnd);
}
MI.getOperand(i).ChangeToRegister(FrameReg, false);