forked from OSchip/llvm-project
[SystemZ] Bugfix in expandRxSBG()
Csmith discovered a program that caused wrong code generation with -O0: When handling a SIGN_EXTEND in expandRxSBG(), RxSBG.BitSize may be less than the Input width (if a truncate was previously traversed), so maskMatters() should be called with a masked based on the width of the sign extend result instead. Review: Ulrich Weigand llvm-svn: 319892
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@ -838,9 +838,16 @@ bool SystemZDAGToDAGISel::expandRxSBG(RxSBGOperands &RxSBG) const {
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case ISD::SIGN_EXTEND: {
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// Check that the extension bits are don't-care (i.e. are masked out
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// by the final mask).
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unsigned BitSize = N.getValueSizeInBits();
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unsigned InnerBitSize = N.getOperand(0).getValueSizeInBits();
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if (maskMatters(RxSBG, allOnes(RxSBG.BitSize) - allOnes(InnerBitSize)))
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return false;
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if (maskMatters(RxSBG, allOnes(BitSize) - allOnes(InnerBitSize))) {
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// In the case where only the sign bit is active, increase Rotate with
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// the extension width.
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if (RxSBG.Mask == 1 && RxSBG.Rotate == 1)
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RxSBG.Rotate += (BitSize - InnerBitSize);
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else
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return false;
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}
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RxSBG.Input = N.getOperand(0);
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return true;
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@ -0,0 +1,24 @@
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; Test that a rosbg conversion involving a sign extend operation rotates with
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; the right number of steps.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -O0 | FileCheck %s
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@g_136 = external global i16, align 2
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@g_999 = external global i32, align 4
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; Function Attrs: nounwind
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define void @main() {
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%1 = load i32, i32* undef, align 4
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store i16 -28141, i16* @g_136, align 2
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%2 = load i32, i32* undef, align 4
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%3 = xor i32 -28141, %2
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%4 = xor i32 %1, %3
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%5 = sext i32 %4 to i64
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%6 = icmp sgt i64 0, %5
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%7 = zext i1 %6 to i32
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%8 = load i32, i32* @g_999, align 4
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%9 = or i32 %8, %7
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; CHECK: rosbg %r1, %r3, 63, 63, 33
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store i32 %9, i32* @g_999, align 4
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ret void
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}
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