forked from OSchip/llvm-project
This optimization greatly enhances efficiency of creating new instructions by
masking and shifting operands directly into their place in the instruction, instead of the old-fashioned way of ORing in each bit separately. llvm-svn: 7179
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@ -59,6 +59,7 @@ void CodeEmitterGen::createEmitter(std::ostream &o) {
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//
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unsigned op = 0;
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std::map<const std::string,unsigned> OpOrder;
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std::map<const std::string,bool> OpContinuous;
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for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
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if (Vals[i].getName() != "Inst" &&
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!Vals[i].getValue()->isComplete() &&
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@ -71,6 +72,90 @@ void CodeEmitterGen::createEmitter(std::ostream &o) {
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<<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
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//<< " MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
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OpOrder[Vals[i].getName()] = op++;
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// Is the operand continuous? If so, we can just mask and OR it in
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// instead of doing it bit-by-bit, saving a lot in runtime cost.
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const BitsInit *InstInit = BI;
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int beginBitInVar = -1, endBitInVar = -1,
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beginBitInInst = -1, endBitInInst = -1;
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bool continuous = true;
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for (int bit = InstInit->getNumBits()-1; bit >= 0; --bit) {
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if (VarBitInit *VBI =
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dynamic_cast<VarBitInit*>(InstInit->getBit(bit))) {
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TypedInit *TI = VBI->getVariable();
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if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
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// only process the current variable
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if (VI->getName() != Vals[i].getName())
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continue;
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if (beginBitInVar == -1)
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beginBitInVar = VBI->getBitNum();
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if (endBitInVar == -1)
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endBitInVar = VBI->getBitNum();
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else {
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if (endBitInVar == (int)VBI->getBitNum() + 1)
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endBitInVar = VBI->getBitNum();
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else {
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continuous = false;
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break;
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}
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}
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if (beginBitInInst == -1)
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beginBitInInst = bit;
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if (endBitInInst == -1)
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endBitInInst = bit;
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else {
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if (endBitInInst == bit + 1)
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endBitInInst = bit;
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else {
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continuous = false;
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break;
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}
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}
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// maintain same distance between bits in field and bits in
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// instruction. if the relative distances stay the same
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// throughout,
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if ((beginBitInVar - (int)VBI->getBitNum()) !=
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(beginBitInInst - bit))
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{
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continuous = false;
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break;
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}
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}
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}
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}
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if (continuous) {
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o << " // continuous: op" << OpOrder[Vals[i].getName()] << "\n";
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// Mask off the right bits
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// Low mask (ie. shift, if necessary)
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if (endBitInVar != 0) {
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o << " op" << OpOrder[Vals[i].getName()]
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<< " >>= endBitInVar;\n";
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beginBitInVar -= endBitInVar;
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endBitInVar = 0;
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}
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// High mask
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o << " op" << OpOrder[Vals[i].getName()]
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<< " &= (1<<" << beginBitInVar+1 << ") - 1;\n";
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// Shift the value to the correct place (according to place in instr)
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if (endBitInInst != 0)
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o << " op" << OpOrder[Vals[i].getName()]
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<< " <<= " << endBitInInst << ";\n";
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// Just OR in the result
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o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n";
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}
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// otherwise, will be taken care of in the loop below using this value:
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OpContinuous[Vals[i].getName()] = continuous;
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}
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}
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@ -81,18 +166,32 @@ void CodeEmitterGen::createEmitter(std::ostream &o) {
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// Scan through the field looking for bit initializers of the current
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// variable...
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for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
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if (BitInit *BI=dynamic_cast<BitInit*>(FieldInitializer->getBit(i))){
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if (BitInit *BI=dynamic_cast<BitInit*>(FieldInitializer->getBit(i)))
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{
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o << " // bit init: f: " << f << ", i: " << i << "\n";
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} else if (UnsetInit *UI =
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} else if (UnsetInit *UI =
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dynamic_cast<UnsetInit*>(FieldInitializer->getBit(i))) {
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o << " // unset init: f: " << f << ", i: " << i << "\n";
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} else if (VarBitInit *VBI =
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dynamic_cast<VarBitInit*>(FieldInitializer->getBit(i))) {
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TypedInit *TI = VBI->getVariable();
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if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
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o << " Value |= getValueBit(op" << OpOrder[VI->getName()]
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<< ", " << VBI->getBitNum()
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<< ")" << " << " << i << ";\n";
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// If the bits of the field are laid out consecutively in the
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// instruction, then instead of separately ORing in bits, just
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// mask and shift the entire field for efficiency.
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if (OpContinuous[VI->getName()]) {
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// already taken care of in the loop above, thus there is no
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// need to individually OR in the bits
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// for debugging, output the regular version anyway, commented
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o << " // Value |= getValueBit(op"
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<< OpOrder[VI->getName()] << ", " << VBI->getBitNum()
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<< ")" << " << " << i << ";\n";
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} else {
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o << " Value |= getValueBit(op" << OpOrder[VI->getName()]
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<< ", " << VBI->getBitNum()
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<< ")" << " << " << i << ";\n";
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}
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} else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
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// FIXME: implement this!
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o << "FIELD INIT not implemented yet!\n";
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@ -100,7 +199,7 @@ void CodeEmitterGen::createEmitter(std::ostream &o) {
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o << "Error: UNIMPLEMENTED\n";
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}
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}
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}
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}
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} else {
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// ignore annul and predict bits since no one sets them yet
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if (Vals[f].getName() == "annul" || Vals[f].getName() == "predict") {
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@ -112,6 +211,7 @@ void CodeEmitterGen::createEmitter(std::ostream &o) {
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o << " break;\n"
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<< " }\n";
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}
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o << " default:\n"
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<< " DEBUG(std::cerr << \"Not supported instr: \" << MI << \"\\n\");\n"
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<< " abort();\n"
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