forked from OSchip/llvm-project
[PowerPC] Add PowerPC compare and multiply related builtins and instrinsics for XL compatibility
This patch is in a series of patches to provide builtins for compatibility with the XL compiler. This patch adds the builtins and instrisics for compare and multiply related operations. Reviewed By: nemanjai, #powerpc Differential revision: https://reviews.llvm.org/D102875
This commit is contained in:
Victor Huang
parent
f2b5e438aa
commit
18c19414eb
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@ -71,6 +71,18 @@ BUILTIN(__builtin_ppc_fctiw, "dd", "")
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BUILTIN(__builtin_ppc_fctiwz, "dd", "")
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BUILTIN(__builtin_ppc_fctudz, "dd", "")
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BUILTIN(__builtin_ppc_fctuwz, "dd", "")
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// Compare
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BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "")
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BUILTIN(__builtin_ppc_cmprb, "iCIiii", "")
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BUILTIN(__builtin_ppc_setb, "LLiLLiLLi", "")
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// Multiply
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BUILTIN(__builtin_ppc_mulhd, "LLiLiLi", "")
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BUILTIN(__builtin_ppc_mulhdu, "ULLiULiULi", "")
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BUILTIN(__builtin_ppc_mulhw, "iii", "")
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BUILTIN(__builtin_ppc_mulhwu, "UiUiUi", "")
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BUILTIN(__builtin_ppc_maddhd, "LLiLLiLLiLLi", "")
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BUILTIN(__builtin_ppc_maddhdu, "ULLiULLiULLiULLi", "")
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BUILTIN(__builtin_ppc_maddld, "LLiLLiLLiLLi", "")
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BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n")
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@ -130,6 +130,16 @@ static void defineXLCompatMacros(MacroBuilder &Builder) {
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Builder.defineMacro("__fctiwz", "__builtin_ppc_fctiwz");
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Builder.defineMacro("__fctudz", "__builtin_ppc_fctudz");
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Builder.defineMacro("__fctuwz", "__builtin_ppc_fctuwz");
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Builder.defineMacro("__cmpeqb", "__builtin_ppc_cmpeqb");
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Builder.defineMacro("__cmprb", "__builtin_ppc_cmprb");
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Builder.defineMacro("__setb", "__builtin_ppc_setb");
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Builder.defineMacro("__mulhd", "__builtin_ppc_mulhd");
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Builder.defineMacro("__mulhdu", "__builtin_ppc_mulhdu");
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Builder.defineMacro("__mulhw", "__builtin_ppc_mulhw");
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Builder.defineMacro("__mulhwu", "__builtin_ppc_mulhwu");
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Builder.defineMacro("__maddhd", "__builtin_ppc_maddhd");
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Builder.defineMacro("__maddhdu", "__builtin_ppc_maddhdu");
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Builder.defineMacro("__maddld", "__builtin_ppc_maddld");
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}
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/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
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@ -3269,6 +3269,13 @@ static bool isPPC_64Builtin(unsigned BuiltinID) {
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case PPC::BI__builtin_ppc_stdcx:
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case PPC::BI__builtin_ppc_tdw:
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case PPC::BI__builtin_ppc_trapd:
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case PPC::BI__builtin_ppc_cmpeqb:
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case PPC::BI__builtin_ppc_setb:
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case PPC::BI__builtin_ppc_mulhd:
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case PPC::BI__builtin_ppc_mulhdu:
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case PPC::BI__builtin_ppc_maddhd:
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case PPC::BI__builtin_ppc_maddhdu:
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case PPC::BI__builtin_ppc_maddld:
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return true;
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}
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return false;
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@ -3360,6 +3367,17 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
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case PPC::BI__builtin_ppc_tw:
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case PPC::BI__builtin_ppc_tdw:
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return SemaBuiltinConstantArgRange(TheCall, 2, 0, 31);
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case PPC::BI__builtin_ppc_cmpeqb:
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case PPC::BI__builtin_ppc_setb:
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case PPC::BI__builtin_ppc_maddhd:
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case PPC::BI__builtin_ppc_maddhdu:
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case PPC::BI__builtin_ppc_maddld:
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return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
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diag::err_ppc_builtin_only_on_arch, "9");
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case PPC::BI__builtin_ppc_cmprb:
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return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
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diag::err_ppc_builtin_only_on_arch, "9") ||
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SemaBuiltinConstantArgRange(TheCall, 0, 0, 1);
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#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
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case PPC::BI__builtin_##Name: \
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return SemaBuiltinPPCMMACall(TheCall, Types);
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@ -0,0 +1,25 @@
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// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
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// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
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// RUN: not %clang_cc1 -triple powerpc-unknown-aix \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 2>&1 | FileCheck %s --check-prefix=CHECK-32-ERROR
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extern long int sli;
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extern unsigned long int uli;
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long long test_builtin_ppc_mulhd() {
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// CHECK-LABEL: @test_builtin_ppc_mulhd(
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// CHECK: %2 = call i64 @llvm.ppc.mulhd(i64 %0, i64 %1)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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return __builtin_ppc_mulhd(sli, sli);
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}
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unsigned long long test_builtin_ppc_mulhdu() {
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// CHECK-LABEL: @test_builtin_ppc_mulhdu(
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// CHECK: %2 = call i64 @llvm.ppc.mulhdu(i64 %0, i64 %1)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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return __builtin_ppc_mulhdu(uli, uli);
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}
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@ -0,0 +1,23 @@
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// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
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// RUN: -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc-unknown-aix \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
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// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
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extern int si;
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extern unsigned int ui;
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int test_builtin_ppc_mulhw() {
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// CHECK-LABEL: @test_builtin_ppc_mulhw(
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// CHECK: %2 = call i32 @llvm.ppc.mulhw(i32 %0, i32 %1)
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return __builtin_ppc_mulhw(si, si);
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}
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unsigned int test_builtin_ppc_mulhwu() {
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// CHECK-LABEL: @test_builtin_ppc_mulhwu(
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// CHECK: %2 = call i32 @llvm.ppc.mulhwu(i32 %0, i32 %1)
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return __builtin_ppc_mulhwu(ui, ui);
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}
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@ -0,0 +1,61 @@
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// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \
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// RUN: -target-cpu pwr9 -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
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// RUN: -target-cpu pwr9 -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
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// RUN: -target-cpu pwr9 -o - | FileCheck %s
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// RUN: not %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \
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// RUN: -target-cpu pwr9 2>&1 | FileCheck %s --check-prefix=CHECK-32-ERROR
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// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
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// RUN: -target-cpu pwr8 2>&1 | FileCheck %s --check-prefix=CHECK-NONPWR9-ERR
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extern signed long long sll;
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extern unsigned long long ull;
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signed long long test_builtin_ppc_cmpeqb() {
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// CHECK-LABEL: @test_builtin_ppc_cmpeqb(
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// CHECK: %2 = call i64 @llvm.ppc.cmpeqb(i64 %0, i64 %1)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
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return __builtin_ppc_cmpeqb(sll, sll);
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}
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long long test_builtin_ppc_setb() {
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// CHECK-LABEL: @test_builtin_ppc_setb(
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// CHECK: %2 = call i64 @llvm.ppc.setb(i64 %0, i64 %1)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
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return __builtin_ppc_setb(sll, sll);
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}
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signed long long test_builtin_ppc_maddhd() {
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// CHECK-LABEL: @test_builtin_ppc_maddhd(
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// CHECK: %3 = call i64 @llvm.ppc.maddhd(i64 %0, i64 %1, i64 %2)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
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return __builtin_ppc_maddhd(sll, sll, sll);
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}
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unsigned long long test_builtin_ppc_maddhdu() {
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// CHECK-LABEL: @test_builtin_ppc_maddhdu(
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// CHECK: %3 = call i64 @llvm.ppc.maddhdu(i64 %0, i64 %1, i64 %2)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
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return __builtin_ppc_maddhdu(ull, ull, ull);
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}
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signed long long test_builtin_ppc_maddld() {
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// CHECK-LABEL: @test_builtin_ppc_maddld(
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// CHECK: %3 = call i64 @llvm.ppc.maddld(i64 %0, i64 %1, i64 %2)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
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return __builtin_ppc_maddld(sll, sll, sll);
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}
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unsigned long long test_builtin_ppc_maddld_unsigned() {
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// CHECK-LABEL: @test_builtin_ppc_maddld_unsigned(
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// CHECK: %3 = call i64 @llvm.ppc.maddld(i64 %0, i64 %1, i64 %2)
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// CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
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// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
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return __builtin_ppc_maddld(ull, ull, ull);
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}
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@ -0,0 +1,15 @@
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// REQUIRES: powerpc-registered-target
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// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -target-cpu pwr9 \
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// RUN: -fsyntax-only -Wall -Werror -verify %s
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// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr9 \
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// RUN: -fsyntax-only -Wall -Werror -verify %s
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix -target-cpu pwr9 \
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// RUN: -fsyntax-only -Wall -Werror -verify %s
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// RUN: %clang_cc1 -triple powerpc-unknown-aix -target-cpu pwr9 \
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// RUN: -fsyntax-only -Wall -Werror -verify %s
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extern unsigned int ui;
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void test_builtin_ppc_cmprb() {
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int res = __builtin_ppc_cmprb(3, ui, ui); // expected-error {{argument value 3 is outside the valid range [0, 1]}}
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}
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@ -0,0 +1,20 @@
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// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \
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// RUN: -target-cpu pwr9 -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
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// RUN: -target-cpu pwr9 -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
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// RUN: -target-cpu pwr9 -o - | FileCheck %s
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// RUN: %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \
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// RUN: -target-cpu pwr9 -o - | FileCheck %s
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// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
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// RUN: -target-cpu pwr8 2>&1 | FileCheck %s --check-prefix=CHECK-NONPWR9-ERR
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extern unsigned int ui;
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int test_builtin_ppc_cmprb() {
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// CHECK-LABEL: @test_builtin_ppc_cmprb(
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// CHECK: %2 = call i32 @llvm.ppc.cmprb(i32 0, i32 %0, i32 %1)
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// CHECK: %5 = call i32 @llvm.ppc.cmprb(i32 1, i32 %3, i32 %4)
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// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
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return __builtin_ppc_cmprb(0, ui, ui) + __builtin_ppc_cmprb(1, ui, ui);
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}
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@ -1565,5 +1565,38 @@ let TargetPrefix = "ppc" in {
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def int_ppc_stwcx : GCCBuiltin<"__builtin_ppc_stwcx">,
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Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
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[IntrWriteMem]>;
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// compare
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def int_ppc_cmpeqb
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: GCCBuiltin<"__builtin_ppc_cmpeqb">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
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def int_ppc_cmprb
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: GCCBuiltin<"__builtin_ppc_cmprb">,
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Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
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[IntrNoMem, ImmArg<ArgIndex<0>>]>;
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def int_ppc_setb
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: GCCBuiltin<"__builtin_ppc_setb">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
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// multiply
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def int_ppc_mulhd
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: GCCBuiltin<"__builtin_ppc_mulhd">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
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def int_ppc_mulhdu
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: GCCBuiltin<"__builtin_ppc_mulhdu">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
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def int_ppc_mulhw
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: GCCBuiltin<"__builtin_ppc_mulhw">,
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Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_ppc_mulhwu
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: GCCBuiltin<"__builtin_ppc_mulhwu">,
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Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_ppc_maddhd
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: GCCBuiltin<"__builtin_ppc_maddhd">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
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def int_ppc_maddhdu
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: GCCBuiltin<"__builtin_ppc_maddhdu">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
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def int_ppc_maddld
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: GCCBuiltin<"__builtin_ppc_maddld">,
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Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>;
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}
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@ -1689,6 +1689,26 @@ def : Pat<(atomic_load_64 XForm:$src), (LDX memrr:$src)>;
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def : Pat<(atomic_store_64 DSForm:$ptr, i64:$val), (STD g8rc:$val, memrix:$ptr)>;
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def : Pat<(atomic_store_64 XForm:$ptr, i64:$val), (STDX g8rc:$val, memrr:$ptr)>;
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let Predicates = [IsISA3_0, In64BitMode] in {
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def : Pat<(i64 (int_ppc_cmpeqb g8rc:$a, g8rc:$b)),
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(i64 (SETB8 (CMPEQB $a, $b)))>;
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def : Pat<(i64 (int_ppc_setb g8rc:$a, g8rc:$b)),
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(i64 (SETB8 (CMPD $a, $b)))>;
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def : Pat<(i64 (int_ppc_maddhd g8rc:$a, g8rc:$b, g8rc:$c)),
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(i64 (MADDHD $a, $b, $c))>;
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def : Pat<(i64 (int_ppc_maddhdu g8rc:$a, g8rc:$b, g8rc:$c)),
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(i64 (MADDHDU $a, $b, $c))>;
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def : Pat<(i64 (int_ppc_maddld g8rc:$a, g8rc:$b, g8rc:$c)),
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(i64 (MADDLD8 $a, $b, $c))>;
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}
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let Predicates = [In64BitMode] in {
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def : Pat<(i64 (int_ppc_mulhd g8rc:$a, g8rc:$b)),
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(i64 (MULHD $a, $b))>;
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def : Pat<(i64 (int_ppc_mulhdu g8rc:$a, g8rc:$b)),
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(i64 (MULHDU $a, $b))>;
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}
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let Predicates = [IsISA3_0] in {
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// DARN (deliver random number)
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// L=0 for 32-bit, L=1 for conditioned random, L=2 for raw random
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@ -5260,6 +5260,15 @@ def SETB : XForm_44<31, 128, (outs gprc:$RT), (ins crrc:$BFA),
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"setb $RT, $BFA", IIC_IntGeneral>;
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} // IsISA3_0
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let Predicates = [IsISA3_0] in {
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def : Pat<(i32 (int_ppc_cmprb i32:$a, gprc:$b, gprc:$c)),
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(i32 (SETB (CMPRB u1imm:$a, $b, $c)))>;
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}
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def : Pat<(i32 (int_ppc_mulhw gprc:$a, gprc:$b)),
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(i32 (MULHW $a, $b))>;
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def : Pat<(i32 (int_ppc_mulhwu gprc:$a, gprc:$b)),
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(i32 (MULHWU $a, $b))>;
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// Fast 32-bit reverse bits algorithm:
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// Step 1: 1-bit swap (swap odd 1-bit and even 1-bit):
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// n = ((n >> 1) & 0x55555555) | ((n << 1) & 0xAAAAAAAA);
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@ -0,0 +1,33 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s
|
||||
|
||||
define dso_local i64 @test_builtin_ppc_cmpeqb(i64 %a, i64 %b) {
|
||||
; CHECK-LABEL: test_builtin_ppc_cmpeqb:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: cmpeqb 0, 3, 4
|
||||
; CHECK-NEXT: setb 3, 0
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%0 = call i64 @llvm.ppc.cmpeqb(i64 %a, i64 %b)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
declare i64 @llvm.ppc.cmpeqb(i64, i64)
|
||||
|
||||
define dso_local i64 @test_builtin_ppc_setb(i64 %a, i64 %b) {
|
||||
; CHECK-LABEL: test_builtin_ppc_setb:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: cmpd 3, 4
|
||||
; CHECK-NEXT: setb 3, 0
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%0 = call i64 @llvm.ppc.setb(i64 %a, i64 %b)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
declare i64 @llvm.ppc.setb(i64, i64)
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-32
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
|
||||
|
||||
define dso_local signext i32 @test_builtin_ppc_cmprb(i32 %a, i32%b, i32 %c, i32%d) {
|
||||
; CHECK-32-LABEL: test_builtin_ppc_cmprb:
|
||||
; CHECK-32: # %bb.0: # %entry
|
||||
; CHECK-32-NEXT: cmprb 0, 0, 3, 4
|
||||
; CHECK-32-NEXT: setb 3, 0
|
||||
; CHECK-32-NEXT: cmprb 0, 1, 5, 6
|
||||
; CHECK-32-NEXT: setb 4, 0
|
||||
; CHECK-32-NEXT: add 3, 3, 4
|
||||
; CHECK-32-NEXT: blr
|
||||
;
|
||||
; CHECK-64-LABEL: test_builtin_ppc_cmprb:
|
||||
; CHECK-64: # %bb.0: # %entry
|
||||
; CHECK-64-NEXT: cmprb 0, 0, 3, 4
|
||||
; CHECK-64-NEXT: setb 3, 0
|
||||
; CHECK-64-NEXT: cmprb 0, 1, 5, 6
|
||||
; CHECK-64-NEXT: setb 4, 0
|
||||
; CHECK-64-NEXT: add 3, 3, 4
|
||||
; CHECK-64-NEXT: extsw 3, 3
|
||||
; CHECK-64-NEXT: blr
|
||||
entry:
|
||||
%0 = call i32 @llvm.ppc.cmprb(i32 0, i32 %a, i32 %b)
|
||||
%1 = call i32 @llvm.ppc.cmprb(i32 1, i32 %c, i32 %d)
|
||||
%add = add nsw i32 %0, %1
|
||||
ret i32 %add
|
||||
}
|
||||
|
||||
declare i32 @llvm.ppc.cmprb(i32, i32, i32)
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s
|
||||
|
||||
define dso_local i64 @test_builtin_ppc_mulhd(i64 %a, i64 %b) {
|
||||
; CHECK-LABEL: test_builtin_ppc_mulhd:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: mulhd 3, 3, 4
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%0 = call i64 @llvm.ppc.mulhd(i64 %a, i64 %b)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
declare i64 @llvm.ppc.mulhd(i64, i64)
|
||||
|
||||
define dso_local i64 @test_builtin_ppc_mulhdu(i64 %a, i64 %b) {
|
||||
; CHECK-LABEL: test_builtin_ppc_mulhdu:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: mulhdu 3, 3, 4
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%0 = call i64 @llvm.ppc.mulhdu(i64 %a, i64 %b)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
declare i64 @llvm.ppc.mulhdu(i64, i64)
|
||||
|
||||
define dso_local i64 @test_builtin_ppc_maddhd(i64 %a, i64 %b, i64 %c) {
|
||||
; CHECK-LABEL: test_builtin_ppc_maddhd:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: maddhd 3, 3, 4, 5
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%0 = call i64 @llvm.ppc.maddhd(i64 %a, i64 %b, i64 %c)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
declare i64 @llvm.ppc.maddhd(i64, i64, i64)
|
||||
|
||||
define dso_local i64 @test_builtin_ppc_maddhdu(i64 %a, i64 %b, i64 %c) {
|
||||
; CHECK-LABEL: test_builtin_ppc_maddhdu:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: maddhdu 3, 3, 4, 5
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%0 = call i64 @llvm.ppc.maddhdu(i64 %a, i64 %b, i64 %c)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
declare i64 @llvm.ppc.maddhdu(i64, i64, i64)
|
||||
|
||||
define dso_local i64 @test_builtin_ppc_maddld(i64 %a, i64 %b, i64 %c) {
|
||||
; CHECK-LABEL: test_builtin_ppc_maddld:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: maddld 3, 3, 4, 5
|
||||
; CHECK-NEXT: blr
|
||||
entry:
|
||||
%0 = call i64 @llvm.ppc.maddld(i64 %a, i64 %b, i64 %c)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
declare i64 @llvm.ppc.maddld(i64, i64, i64)
|
||||
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-32
|
||||
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
|
||||
; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-64
|
||||
|
||||
define dso_local signext i32 @test_builtin_ppc_mulhw(i32 %a, i32%b) {
|
||||
; CHECK-32-LABEL: test_builtin_ppc_mulhw:
|
||||
; CHECK-32: # %bb.0: # %entry
|
||||
; CHECK-32-NEXT: mulhw 3, 3, 4
|
||||
; CHECK-32-NEXT: blr
|
||||
;
|
||||
; CHECK-64-LABEL: test_builtin_ppc_mulhw:
|
||||
; CHECK-64: # %bb.0: # %entry
|
||||
; CHECK-64-NEXT: mulhw 3, 3, 4
|
||||
; CHECK-64-NEXT: extsw 3, 3
|
||||
; CHECK-64-NEXT: blr
|
||||
entry:
|
||||
%0 = call i32 @llvm.ppc.mulhw(i32 %a, i32 %b)
|
||||
ret i32 %0
|
||||
}
|
||||
|
||||
declare i32 @llvm.ppc.mulhw(i32, i32)
|
||||
|
||||
define dso_local zeroext i32 @test_builtin_ppc_mulhwu(i32 %a, i32%b) {
|
||||
; CHECK-32-LABEL: test_builtin_ppc_mulhwu:
|
||||
; CHECK-32: # %bb.0: # %entry
|
||||
; CHECK-32-NEXT: mulhwu 3, 3, 4
|
||||
; CHECK-32-NEXT: blr
|
||||
;
|
||||
; CHECK-64-LABEL: test_builtin_ppc_mulhwu:
|
||||
; CHECK-64: # %bb.0: # %entry
|
||||
; CHECK-64-NEXT: mulhwu 3, 3, 4
|
||||
; CHECK-64-NEXT: clrldi 3, 3, 32
|
||||
; CHECK-64-NEXT: blr
|
||||
entry:
|
||||
%0 = call i32 @llvm.ppc.mulhwu(i32 %a, i32 %b)
|
||||
ret i32 %0
|
||||
}
|
||||
|
||||
declare i32 @llvm.ppc.mulhwu(i32, i32)
|
||||
Loading…
Reference in New Issue