forked from OSchip/llvm-project
ARM: Add -m[no-]crc to dis/enable CRC subtargetfeature from clang
Allow users to disable or enable CRC subtarget feature. Differential Revision: http://llvm-reviews.chandlerc.com/D2037 llvm-svn: 193600
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@ -1057,6 +1057,15 @@ are listed below.
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hardware division instructions. This only applies to the ARM
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architecture.
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.. option:: -m[no-]crc
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Enable or disable CRC instructions.
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This option is used to indicate whether CRC instructions are to
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be generated. This only applies to the ARM architecture.
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CRC instructions are enabled by default on ARMv8.
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Controlling Size of Debug Information
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-------------------------------------
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@ -1023,6 +1023,10 @@ def mno_thumb : Flag<["-"], "mno-thumb">, Group<m_arm_Features_Group>;
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def marm : Flag<["-"], "marm">, Alias<mno_thumb>;
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def ffixed_r9 : Flag<["-"], "ffixed-r9">, Group<m_arm_Features_Group>,
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HelpText<"Reserve the r9 register (ARM only)">;
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def mcrc : Flag<["-"], "mcrc">, Group<m_arm_Features_Group>,
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HelpText<"Allow use of CRC instructions (ARM only)">;
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def mnocrc : Flag<["-"], "mnocrc">, Group<m_arm_Features_Group>,
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HelpText<"Disallow use of CRC instructions (ARM only)">;
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def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
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def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>;
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@ -3633,6 +3633,8 @@ class ARMTargetInfo : public TargetInfo {
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unsigned SoftFloat : 1;
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unsigned SoftFloatABI : 1;
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unsigned CRC : 1;
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static const Builtin::Info BuiltinInfo[];
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static bool shouldUseInlineAtomic(const llvm::Triple &T) {
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@ -3784,6 +3786,7 @@ public:
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Features["neon"] = true;
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Features["hwdiv"] = true;
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Features["hwdiv-arm"] = true;
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Features["crc"] = true;
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} else if (CPU == "cortex-r5" || CPU == "cortex-m3" ||
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CPU == "cortex-m4" ||
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// Enable the hwdiv extension for all v8a AArch32 cores by
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@ -3798,6 +3801,7 @@ public:
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virtual bool handleTargetFeatures(std::vector<std::string> &Features,
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DiagnosticsEngine &Diags) {
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FPU = 0;
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CRC = 0;
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SoftFloat = SoftFloatABI = false;
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HWDiv = 0;
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for (unsigned i = 0, e = Features.size(); i != e; ++i) {
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@ -3819,6 +3823,8 @@ public:
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HWDiv |= HWDivThumb;
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else if (Features[i] == "+hwdiv-arm")
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HWDiv |= HWDivARM;
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else if (Features[i] == "+crc")
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CRC = 1;
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}
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if (!(FPU & NeonFPU) && FPMath == FP_Neon) {
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@ -3970,7 +3976,7 @@ public:
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if ((FPU & NeonFPU) && !SoftFloat && CPUArchVer >= 7)
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Builder.defineMacro("__ARM_NEON__");
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if (CPUArchVer == 8)
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if (CRC)
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Builder.defineMacro("__ARM_FEATURE_CRC32");
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if (CPUArchVer >= 6 && CPUArch != "6M") {
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@ -773,6 +773,15 @@ static void getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
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// implementation, although the same isn't true of VFP or VFP3.
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if (FloatABI == "soft")
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Features.push_back("-neon");
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// En/disable crc
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if (Arg *A = Args.getLastArg(options::OPT_mcrc,
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options::OPT_mnocrc)) {
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if (A->getOption().matches(options::OPT_mcrc))
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Features.push_back("+crc");
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else
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Features.push_back("-crc");
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}
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}
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void Clang::AddARMTargetArgs(const ArgList &Args,
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@ -55,6 +55,7 @@
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// RUN: %clang -target armv8-linux-gnueabihf -mfpu=fp-armv8 %s -### 2>&1 \
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// RUN: | FileCheck --check-prefix=CHECK-FP-ARMV8 %s
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// CHECK-FP-ARMV8-NOT: "-target-feature" "+neon"
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// CHECK-FP-ARMV8: "-target-feature" "+fp-armv8"
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// CHECK-FP-ARMV8: "-target-feature" "-neon"
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// CHECK-FP-ARMV8: "-target-feature" "-crypto"
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@ -0,0 +1,8 @@
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// RUN: %clang -target armv8 -mcrc -### %s 2> %t
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// RUN: FileCheck --check-prefix=CHECK-V8-CRC < %t %s
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// CHECK-V8-CRC: "-target-feature" "+crc"
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// RUN: %clang -target armv8 -mnocrc -### %s 2> %t
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// RUN: FileCheck --check-prefix=CHECK-V8-NOCRC < %t %s
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// CHECK-V8-NOCRC: "-target-feature" "-crc"
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@ -27,6 +27,9 @@
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// CHECK-V8-BAREHF-NEON-FP: __ARM_NEON__ 1
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// CHECK-V8-BAREHF-NEON-FP: __VFP_FP__ 1
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// RUN: %clang -target armv8a -mnocrc -x c -E -dM %s | FileCheck --check-prefix=CHECK-V8-NOCRC %s
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// CHECK-V8-NOCRC-NOT: __ARM_FEATURE_CRC32 1
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// Check that -mhwdiv works properly for armv8/thumbv8 (enabled by default).
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// RUN: %clang -target armv8 -x c -E -dM %s -o - | FileCheck --check-prefix=ARMV8 %s
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