forked from OSchip/llvm-project
[AArch64][SVE] Asm: Support for INC/DEC (scalar) instructions.
Increment/decrement scalar register by (scaled) element count given by predicate pattern, e.g. 'incw x0, all, mul #4'. Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D47713 llvm-svn: 334838
This commit is contained in:
Sander de Smalen
parent
aefdb8ed34
commit
18ac8f9f25
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@ -477,6 +477,15 @@ let Predicates = [HasSVE] in {
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def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">;
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def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
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defm INCB_XPiI : sve_int_pred_pattern_a<0b000, "incb">;
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defm DECB_XPiI : sve_int_pred_pattern_a<0b001, "decb">;
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defm INCH_XPiI : sve_int_pred_pattern_a<0b010, "inch">;
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defm DECH_XPiI : sve_int_pred_pattern_a<0b011, "dech">;
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defm INCW_XPiI : sve_int_pred_pattern_a<0b100, "incw">;
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defm DECW_XPiI : sve_int_pred_pattern_a<0b101, "decw">;
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defm INCD_XPiI : sve_int_pred_pattern_a<0b110, "incd">;
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defm DECD_XPiI : sve_int_pred_pattern_a<0b111, "decd">;
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defm INDEX_RR : sve_int_index_rr<"index">;
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defm INDEX_IR : sve_int_index_ir<"index">;
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defm INDEX_RI : sve_int_index_ri<"index">;
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@ -88,7 +88,7 @@ private:
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bool parseRegister(OperandVector &Operands);
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bool parseSymbolicImmVal(const MCExpr *&ImmVal);
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bool parseNeonVectorList(OperandVector &Operands);
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bool parseOptionalMulVl(OperandVector &Operands);
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bool parseOptionalMulOperand(OperandVector &Operands);
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bool parseOperand(OperandVector &Operands, bool isCondCode,
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bool invertCondCode);
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@ -3199,27 +3199,45 @@ AArch64AsmParser::tryParseGPROperand(OperandVector &Operands) {
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return MatchOperand_Success;
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}
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bool AArch64AsmParser::parseOptionalMulVl(OperandVector &Operands) {
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bool AArch64AsmParser::parseOptionalMulOperand(OperandVector &Operands) {
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MCAsmParser &Parser = getParser();
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// Some SVE instructions have a decoration after the immediate, i.e.
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// "mul vl". We parse them here and add tokens, which must be present in the
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// asm string in the tablegen instruction.
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bool NextIsVL = Parser.getLexer().peekTok().getString().equals_lower("vl");
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bool NextIsHash = Parser.getLexer().peekTok().is(AsmToken::Hash);
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if (!Parser.getTok().getString().equals_lower("mul") ||
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!Parser.getLexer().peekTok().getString().equals_lower("vl"))
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!(NextIsVL || NextIsHash))
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return true;
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SMLoc S = getLoc();
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Operands.push_back(
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AArch64Operand::CreateToken("mul", false, S, getContext()));
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AArch64Operand::CreateToken("mul", false, getLoc(), getContext()));
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Parser.Lex(); // Eat the "mul"
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S = getLoc();
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Operands.push_back(
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AArch64Operand::CreateToken("vl", false, S, getContext()));
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Parser.Lex(); // Eat the "vl"
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if (NextIsVL) {
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Operands.push_back(
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AArch64Operand::CreateToken("vl", false, getLoc(), getContext()));
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Parser.Lex(); // Eat the "vl"
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return false;
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}
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return false;
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if (NextIsHash) {
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Parser.Lex(); // Eat the #
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SMLoc S = getLoc();
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// Parse immediate operand.
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const MCExpr *ImmVal;
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if (!Parser.parseExpression(ImmVal))
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if (const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(ImmVal)) {
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Operands.push_back(AArch64Operand::CreateImm(
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MCConstantExpr::create(MCE->getValue(), getContext()), S, getLoc(),
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getContext()));
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return MatchOperand_Success;
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}
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}
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return Error(getLoc(), "expected 'vl' or '#<imm>'");
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}
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/// parseOperand - Parse a arm instruction operand. For now this parses the
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@ -3275,8 +3293,9 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
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if (!parseRegister(Operands))
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return false;
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// See if this is a "mul vl" decoration used by SVE instructions.
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if (!parseOptionalMulVl(Operands))
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// See if this is a "mul vl" decoration or "mul #<int>" operand used
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// by SVE instructions.
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if (!parseOptionalMulOperand(Operands))
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return false;
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// This could be an optional "shift" or "extend" operand.
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@ -210,6 +210,8 @@ static DecodeStatus DecodeSImm(llvm::MCInst &Inst, uint64_t Imm,
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template <int ElementWidth>
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static DecodeStatus DecodeImm8OptLsl(MCInst &Inst, unsigned Imm,
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uint64_t Addr, const void *Decoder);
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static DecodeStatus DecodeSVEIncDecImm(MCInst &Inst, unsigned Imm,
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uint64_t Addr, const void *Decoder);
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static bool Check(DecodeStatus &Out, DecodeStatus In) {
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switch (In) {
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@ -1791,3 +1793,10 @@ static DecodeStatus DecodeImm8OptLsl(MCInst &Inst, unsigned Imm,
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Inst.addOperand(MCOperand::createImm(Shift));
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return Success;
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}
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// Decode uimm4 ranged from 1-16.
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static DecodeStatus DecodeSVEIncDecImm(MCInst &Inst, unsigned Imm,
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uint64_t Addr, const void *Decoder) {
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Inst.addOperand(MCOperand::createImm(Imm + 1));
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return Success;
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}
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@ -166,6 +166,9 @@ public:
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uint32_t getImm8OptLsl(const MCInst &MI, unsigned OpIdx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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uint32_t getSVEIncDecImm(const MCInst &MI, unsigned OpIdx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned fixMOVZ(const MCInst &MI, unsigned EncodedValue,
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const MCSubtargetInfo &STI) const;
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@ -531,6 +534,16 @@ AArch64MCCodeEmitter::getImm8OptLsl(const MCInst &MI, unsigned OpIdx,
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return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal));
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}
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uint32_t
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AArch64MCCodeEmitter::getSVEIncDecImm(const MCInst &MI, unsigned OpIdx,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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const MCOperand &MO = MI.getOperand(OpIdx);
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assert(MO.isImm() && "Expected an immediate value!");
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// Normalize 1-16 range to 0-15.
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return MO.getImm() - 1;
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}
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/// getMoveVecShifterOpValue - Return the encoded value for the vector move
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/// shifter (MSL).
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uint32_t AArch64MCCodeEmitter::getMoveVecShifterOpValue(
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@ -226,6 +226,14 @@ def sve_fpimm_zero_one
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: SVEExactFPImmOperand<"ZeroOne", "AArch64ExactFPImm::zero",
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"AArch64ExactFPImm::one">;
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def sve_incdec_imm : Operand<i32>, ImmLeaf<i32, [{
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return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
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}]> {
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let ParserMatchClass = Imm1_16Operand;
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let EncoderMethod = "getSVEIncDecImm";
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let DecoderMethod = "DecodeSVEIncDecImm";
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}
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//===----------------------------------------------------------------------===//
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// SVE PTrue - These are used extensively throughout the pattern matching so
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// it's important we define them first.
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@ -272,6 +280,41 @@ let Predicates = [HasSVE] in {
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defm PTRUES : sve_int_ptrue<0b001, "ptrues">;
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}
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//===----------------------------------------------------------------------===//
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// SVE Element Count Group
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//===----------------------------------------------------------------------===//
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class sve_int_pred_pattern_a<bits<3> opc, string asm>
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: I<(outs GPR64:$Rdn), (ins GPR64:$_Rdn, sve_pred_enum:$pattern, sve_incdec_imm:$imm4),
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asm, "\t$Rdn, $pattern, mul $imm4",
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"",
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[]>, Sched<[]> {
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bits<5> Rdn;
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bits<5> pattern;
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bits<4> imm4;
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let Inst{31-24} = 0b00000100;
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let Inst{23-22} = opc{2-1};
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let Inst{21-20} = 0b11;
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let Inst{19-16} = imm4;
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let Inst{15-11} = 0b11100;
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let Inst{10} = opc{0};
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let Inst{9-5} = pattern;
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let Inst{4-0} = Rdn;
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let Constraints = "$Rdn = $_Rdn";
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}
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multiclass sve_int_pred_pattern_a<bits<3> opc, string asm> {
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def NAME : sve_int_pred_pattern_a<opc, asm>;
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def : InstAlias<asm # "\t$Rdn, $pattern",
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(!cast<Instruction>(NAME) GPR64:$Rdn, sve_pred_enum:$pattern, 1), 1>;
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def : InstAlias<asm # "\t$Rdn",
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(!cast<Instruction>(NAME) GPR64:$Rdn, 0b11111, 1), 2>;
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}
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//===----------------------------------------------------------------------===//
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// SVE Permute - Cross Lane Group
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//===----------------------------------------------------------------------===//
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@ -0,0 +1,57 @@
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid result register
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decb w0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
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// CHECK-NEXT: decb w0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decb sp
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
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// CHECK-NEXT: decb sp
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Immediate not compatible with encode/decode function.
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decb x0, all, mul #-1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
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// CHECK-NEXT: decb x0, all, mul #-1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decb x0, all, mul #0
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
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// CHECK-NEXT: decb x0, all, mul #0
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decb x0, all, mul #17
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
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// CHECK-NEXT: decb x0, all, mul #17
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid predicate patterns
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decb x0, vl512
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
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// CHECK-NEXT: decb x0, vl512
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decb x0, vl9
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
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// CHECK-NEXT: decb x0, vl9
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decb x0, #-1
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
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// CHECK-NEXT: decb x0, #-1
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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decb x0, #32
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
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// CHECK-NEXT: decb x0, #32
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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@ -0,0 +1,128 @@
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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decb x0
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// CHECK-INST: decb x0
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// CHECK-ENCODING: [0xe0,0xe7,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 e7 30 04 <unknown>
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decb x0, all
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// CHECK-INST: decb x0
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// CHECK-ENCODING: [0xe0,0xe7,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 e7 30 04 <unknown>
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decb x0, all, mul #1
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// CHECK-INST: decb x0
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// CHECK-ENCODING: [0xe0,0xe7,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 e7 30 04 <unknown>
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decb x0, all, mul #16
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// CHECK-INST: decb x0, all, mul #16
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// CHECK-ENCODING: [0xe0,0xe7,0x3f,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 e7 3f 04 <unknown>
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decb x0, pow2
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// CHECK-INST: decb x0, pow2
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// CHECK-ENCODING: [0x00,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 e4 30 04 <unknown>
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decb x0, vl1
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// CHECK-INST: decb x0, vl1
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// CHECK-ENCODING: [0x20,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 20 e4 30 04 <unknown>
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decb x0, vl2
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// CHECK-INST: decb x0, vl2
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// CHECK-ENCODING: [0x40,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 40 e4 30 04 <unknown>
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decb x0, vl3
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// CHECK-INST: decb x0, vl3
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// CHECK-ENCODING: [0x60,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 60 e4 30 04 <unknown>
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decb x0, vl4
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// CHECK-INST: decb x0, vl4
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// CHECK-ENCODING: [0x80,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 80 e4 30 04 <unknown>
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decb x0, vl5
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// CHECK-INST: decb x0, vl5
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// CHECK-ENCODING: [0xa0,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a0 e4 30 04 <unknown>
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decb x0, vl6
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// CHECK-INST: decb x0, vl6
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// CHECK-ENCODING: [0xc0,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: c0 e4 30 04 <unknown>
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decb x0, vl7
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// CHECK-INST: decb x0, vl7
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// CHECK-ENCODING: [0xe0,0xe4,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 e4 30 04 <unknown>
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decb x0, vl8
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// CHECK-INST: decb x0, vl8
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// CHECK-ENCODING: [0x00,0xe5,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 e5 30 04 <unknown>
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decb x0, vl16
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// CHECK-INST: decb x0, vl16
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// CHECK-ENCODING: [0x20,0xe5,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 20 e5 30 04 <unknown>
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decb x0, vl32
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// CHECK-INST: decb x0, vl32
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// CHECK-ENCODING: [0x40,0xe5,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 40 e5 30 04 <unknown>
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decb x0, vl64
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// CHECK-INST: decb x0, vl64
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// CHECK-ENCODING: [0x60,0xe5,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 60 e5 30 04 <unknown>
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decb x0, vl128
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// CHECK-INST: decb x0, vl128
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// CHECK-ENCODING: [0x80,0xe5,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 80 e5 30 04 <unknown>
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decb x0, vl256
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// CHECK-INST: decb x0, vl256
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// CHECK-ENCODING: [0xa0,0xe5,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a0 e5 30 04 <unknown>
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decb x0, #14
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// CHECK-INST: decb x0, #14
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// CHECK-ENCODING: [0xc0,0xe5,0x30,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: c0 e5 30 04 <unknown>
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decb x0, #28
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// CHECK-INST: decb x0, #28
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// CHECK-ENCODING: [0x80,0xe7,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e7 30 04 <unknown>
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid result register
|
||||
|
||||
decd w0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: decd w0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decd sp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: decd sp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Immediate not compatible with encode/decode function.
|
||||
|
||||
decd x0, all, mul #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: decd x0, all, mul #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decd x0, all, mul #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: decd x0, all, mul #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decd x0, all, mul #17
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: decd x0, all, mul #17
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid predicate patterns
|
||||
|
||||
decd x0, vl512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decd x0, vl512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decd x0, vl9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decd x0, vl9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decd x0, #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decd x0, #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decd x0, #32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decd x0, #32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
decd x0
|
||||
// CHECK-INST: decd x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 f0 04 <unknown>
|
||||
|
||||
decd x0, all
|
||||
// CHECK-INST: decd x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 f0 04 <unknown>
|
||||
|
||||
decd x0, all, mul #1
|
||||
// CHECK-INST: decd x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 f0 04 <unknown>
|
||||
|
||||
decd x0, all, mul #16
|
||||
// CHECK-INST: decd x0, all, mul #16
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xff,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 ff 04 <unknown>
|
||||
|
||||
decd x0, pow2
|
||||
// CHECK-INST: decd x0, pow2
|
||||
// CHECK-ENCODING: [0x00,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl1
|
||||
// CHECK-INST: decd x0, vl1
|
||||
// CHECK-ENCODING: [0x20,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl2
|
||||
// CHECK-INST: decd x0, vl2
|
||||
// CHECK-ENCODING: [0x40,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl3
|
||||
// CHECK-INST: decd x0, vl3
|
||||
// CHECK-ENCODING: [0x60,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl4
|
||||
// CHECK-INST: decd x0, vl4
|
||||
// CHECK-ENCODING: [0x80,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl5
|
||||
// CHECK-INST: decd x0, vl5
|
||||
// CHECK-ENCODING: [0xa0,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl6
|
||||
// CHECK-INST: decd x0, vl6
|
||||
// CHECK-ENCODING: [0xc0,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl7
|
||||
// CHECK-INST: decd x0, vl7
|
||||
// CHECK-ENCODING: [0xe0,0xe4,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e4 f0 04 <unknown>
|
||||
|
||||
decd x0, vl8
|
||||
// CHECK-INST: decd x0, vl8
|
||||
// CHECK-ENCODING: [0x00,0xe5,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e5 f0 04 <unknown>
|
||||
|
||||
decd x0, vl16
|
||||
// CHECK-INST: decd x0, vl16
|
||||
// CHECK-ENCODING: [0x20,0xe5,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e5 f0 04 <unknown>
|
||||
|
||||
decd x0, vl32
|
||||
// CHECK-INST: decd x0, vl32
|
||||
// CHECK-ENCODING: [0x40,0xe5,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e5 f0 04 <unknown>
|
||||
|
||||
decd x0, vl64
|
||||
// CHECK-INST: decd x0, vl64
|
||||
// CHECK-ENCODING: [0x60,0xe5,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e5 f0 04 <unknown>
|
||||
|
||||
decd x0, vl128
|
||||
// CHECK-INST: decd x0, vl128
|
||||
// CHECK-ENCODING: [0x80,0xe5,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e5 f0 04 <unknown>
|
||||
|
||||
decd x0, vl256
|
||||
// CHECK-INST: decd x0, vl256
|
||||
// CHECK-ENCODING: [0xa0,0xe5,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e5 f0 04 <unknown>
|
||||
|
||||
decd x0, #14
|
||||
// CHECK-INST: decd x0, #14
|
||||
// CHECK-ENCODING: [0xc0,0xe5,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e5 f0 04 <unknown>
|
||||
|
||||
decd x0, #28
|
||||
// CHECK-INST: decd x0, #28
|
||||
// CHECK-ENCODING: [0x80,0xe7,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e7 f0 04 <unknown>
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid result register
|
||||
|
||||
dech w0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: dech w0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
dech sp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: dech sp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Immediate not compatible with encode/decode function.
|
||||
|
||||
dech x0, all, mul #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: dech x0, all, mul #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
dech x0, all, mul #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: dech x0, all, mul #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
dech x0, all, mul #17
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: dech x0, all, mul #17
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid predicate patterns
|
||||
|
||||
dech x0, vl512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: dech x0, vl512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
dech x0, vl9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: dech x0, vl9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
dech x0, #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: dech x0, #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
dech x0, #32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: dech x0, #32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
dech x0
|
||||
// CHECK-INST: dech x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 70 04 <unknown>
|
||||
|
||||
dech x0, all
|
||||
// CHECK-INST: dech x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 70 04 <unknown>
|
||||
|
||||
dech x0, all, mul #1
|
||||
// CHECK-INST: dech x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 70 04 <unknown>
|
||||
|
||||
dech x0, all, mul #16
|
||||
// CHECK-INST: dech x0, all, mul #16
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0x7f,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 7f 04 <unknown>
|
||||
|
||||
dech x0, pow2
|
||||
// CHECK-INST: dech x0, pow2
|
||||
// CHECK-ENCODING: [0x00,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl1
|
||||
// CHECK-INST: dech x0, vl1
|
||||
// CHECK-ENCODING: [0x20,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl2
|
||||
// CHECK-INST: dech x0, vl2
|
||||
// CHECK-ENCODING: [0x40,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl3
|
||||
// CHECK-INST: dech x0, vl3
|
||||
// CHECK-ENCODING: [0x60,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl4
|
||||
// CHECK-INST: dech x0, vl4
|
||||
// CHECK-ENCODING: [0x80,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl5
|
||||
// CHECK-INST: dech x0, vl5
|
||||
// CHECK-ENCODING: [0xa0,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl6
|
||||
// CHECK-INST: dech x0, vl6
|
||||
// CHECK-ENCODING: [0xc0,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl7
|
||||
// CHECK-INST: dech x0, vl7
|
||||
// CHECK-ENCODING: [0xe0,0xe4,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e4 70 04 <unknown>
|
||||
|
||||
dech x0, vl8
|
||||
// CHECK-INST: dech x0, vl8
|
||||
// CHECK-ENCODING: [0x00,0xe5,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e5 70 04 <unknown>
|
||||
|
||||
dech x0, vl16
|
||||
// CHECK-INST: dech x0, vl16
|
||||
// CHECK-ENCODING: [0x20,0xe5,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e5 70 04 <unknown>
|
||||
|
||||
dech x0, vl32
|
||||
// CHECK-INST: dech x0, vl32
|
||||
// CHECK-ENCODING: [0x40,0xe5,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e5 70 04 <unknown>
|
||||
|
||||
dech x0, vl64
|
||||
// CHECK-INST: dech x0, vl64
|
||||
// CHECK-ENCODING: [0x60,0xe5,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e5 70 04 <unknown>
|
||||
|
||||
dech x0, vl128
|
||||
// CHECK-INST: dech x0, vl128
|
||||
// CHECK-ENCODING: [0x80,0xe5,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e5 70 04 <unknown>
|
||||
|
||||
dech x0, vl256
|
||||
// CHECK-INST: dech x0, vl256
|
||||
// CHECK-ENCODING: [0xa0,0xe5,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e5 70 04 <unknown>
|
||||
|
||||
dech x0, #14
|
||||
// CHECK-INST: dech x0, #14
|
||||
// CHECK-ENCODING: [0xc0,0xe5,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e5 70 04 <unknown>
|
||||
|
||||
dech x0, #28
|
||||
// CHECK-INST: dech x0, #28
|
||||
// CHECK-ENCODING: [0x80,0xe7,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e7 70 04 <unknown>
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid result register
|
||||
|
||||
decw w0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: decw w0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decw sp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: decw sp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Immediate not compatible with encode/decode function.
|
||||
|
||||
decw x0, all, mul #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: decw x0, all, mul #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decw x0, all, mul #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: decw x0, all, mul #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decw x0, all, mul #17
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: decw x0, all, mul #17
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid predicate patterns
|
||||
|
||||
decw x0, vl512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decw x0, vl512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decw x0, vl9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decw x0, vl9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decw x0, #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decw x0, #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
decw x0, #32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: decw x0, #32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
decw x0
|
||||
// CHECK-INST: decw x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 b0 04 <unknown>
|
||||
|
||||
decw x0, all
|
||||
// CHECK-INST: decw x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 b0 04 <unknown>
|
||||
|
||||
decw x0, all, mul #1
|
||||
// CHECK-INST: decw x0
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 b0 04 <unknown>
|
||||
|
||||
decw x0, all, mul #16
|
||||
// CHECK-INST: decw x0, all, mul #16
|
||||
// CHECK-ENCODING: [0xe0,0xe7,0xbf,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e7 bf 04 <unknown>
|
||||
|
||||
decw x0, pow2
|
||||
// CHECK-INST: decw x0, pow2
|
||||
// CHECK-ENCODING: [0x00,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl1
|
||||
// CHECK-INST: decw x0, vl1
|
||||
// CHECK-ENCODING: [0x20,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl2
|
||||
// CHECK-INST: decw x0, vl2
|
||||
// CHECK-ENCODING: [0x40,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl3
|
||||
// CHECK-INST: decw x0, vl3
|
||||
// CHECK-ENCODING: [0x60,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl4
|
||||
// CHECK-INST: decw x0, vl4
|
||||
// CHECK-ENCODING: [0x80,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl5
|
||||
// CHECK-INST: decw x0, vl5
|
||||
// CHECK-ENCODING: [0xa0,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl6
|
||||
// CHECK-INST: decw x0, vl6
|
||||
// CHECK-ENCODING: [0xc0,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl7
|
||||
// CHECK-INST: decw x0, vl7
|
||||
// CHECK-ENCODING: [0xe0,0xe4,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e4 b0 04 <unknown>
|
||||
|
||||
decw x0, vl8
|
||||
// CHECK-INST: decw x0, vl8
|
||||
// CHECK-ENCODING: [0x00,0xe5,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e5 b0 04 <unknown>
|
||||
|
||||
decw x0, vl16
|
||||
// CHECK-INST: decw x0, vl16
|
||||
// CHECK-ENCODING: [0x20,0xe5,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e5 b0 04 <unknown>
|
||||
|
||||
decw x0, vl32
|
||||
// CHECK-INST: decw x0, vl32
|
||||
// CHECK-ENCODING: [0x40,0xe5,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e5 b0 04 <unknown>
|
||||
|
||||
decw x0, vl64
|
||||
// CHECK-INST: decw x0, vl64
|
||||
// CHECK-ENCODING: [0x60,0xe5,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e5 b0 04 <unknown>
|
||||
|
||||
decw x0, vl128
|
||||
// CHECK-INST: decw x0, vl128
|
||||
// CHECK-ENCODING: [0x80,0xe5,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e5 b0 04 <unknown>
|
||||
|
||||
decw x0, vl256
|
||||
// CHECK-INST: decw x0, vl256
|
||||
// CHECK-ENCODING: [0xa0,0xe5,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e5 b0 04 <unknown>
|
||||
|
||||
decw x0, #14
|
||||
// CHECK-INST: decw x0, #14
|
||||
// CHECK-ENCODING: [0xc0,0xe5,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e5 b0 04 <unknown>
|
||||
|
||||
decw x0, #28
|
||||
// CHECK-INST: decw x0, #28
|
||||
// CHECK-ENCODING: [0x80,0xe7,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e7 b0 04 <unknown>
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid result register
|
||||
|
||||
incb w0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: incb w0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incb sp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: incb sp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Immediate not compatible with encode/decode function.
|
||||
|
||||
incb x0, all, mul #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incb x0, all, mul #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incb x0, all, mul #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incb x0, all, mul #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incb x0, all, mul #17
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incb x0, all, mul #17
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid predicate patterns
|
||||
|
||||
incb x0, vl512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incb x0, vl512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incb x0, vl9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incb x0, vl9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incb x0, #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incb x0, #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incb x0, #32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incb x0, #32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,206 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
incb x0
|
||||
// CHECK-INST: incb x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 30 04 <unknown>
|
||||
|
||||
incb x0, all
|
||||
// CHECK-INST: incb x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 30 04 <unknown>
|
||||
|
||||
incb x0, all, mul #1
|
||||
// CHECK-INST: incb x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 30 04 <unknown>
|
||||
|
||||
incb x0, all, mul #16
|
||||
// CHECK-INST: incb x0, all, mul #16
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x3f,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 3f 04 <unknown>
|
||||
|
||||
incb x0, pow2
|
||||
// CHECK-INST: incb x0, pow2
|
||||
// CHECK-ENCODING: [0x00,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl1
|
||||
// CHECK-INST: incb x0, vl1
|
||||
// CHECK-ENCODING: [0x20,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl2
|
||||
// CHECK-INST: incb x0, vl2
|
||||
// CHECK-ENCODING: [0x40,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl3
|
||||
// CHECK-INST: incb x0, vl3
|
||||
// CHECK-ENCODING: [0x60,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl4
|
||||
// CHECK-INST: incb x0, vl4
|
||||
// CHECK-ENCODING: [0x80,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl5
|
||||
// CHECK-INST: incb x0, vl5
|
||||
// CHECK-ENCODING: [0xa0,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl6
|
||||
// CHECK-INST: incb x0, vl6
|
||||
// CHECK-ENCODING: [0xc0,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl7
|
||||
// CHECK-INST: incb x0, vl7
|
||||
// CHECK-ENCODING: [0xe0,0xe0,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e0 30 04 <unknown>
|
||||
|
||||
incb x0, vl8
|
||||
// CHECK-INST: incb x0, vl8
|
||||
// CHECK-ENCODING: [0x00,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e1 30 04 <unknown>
|
||||
|
||||
incb x0, vl16
|
||||
// CHECK-INST: incb x0, vl16
|
||||
// CHECK-ENCODING: [0x20,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e1 30 04 <unknown>
|
||||
|
||||
incb x0, vl32
|
||||
// CHECK-INST: incb x0, vl32
|
||||
// CHECK-ENCODING: [0x40,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e1 30 04 <unknown>
|
||||
|
||||
incb x0, vl64
|
||||
// CHECK-INST: incb x0, vl64
|
||||
// CHECK-ENCODING: [0x60,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e1 30 04 <unknown>
|
||||
|
||||
incb x0, vl128
|
||||
// CHECK-INST: incb x0, vl128
|
||||
// CHECK-ENCODING: [0x80,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e1 30 04 <unknown>
|
||||
|
||||
incb x0, vl256
|
||||
// CHECK-INST: incb x0, vl256
|
||||
// CHECK-ENCODING: [0xa0,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e1 30 04 <unknown>
|
||||
|
||||
incb x0, #14
|
||||
// CHECK-INST: incb x0, #14
|
||||
// CHECK-ENCODING: [0xc0,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e1 30 04 <unknown>
|
||||
|
||||
incb x0, #15
|
||||
// CHECK-INST: incb x0, #15
|
||||
// CHECK-ENCODING: [0xe0,0xe1,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e1 30 04 <unknown>
|
||||
|
||||
incb x0, #16
|
||||
// CHECK-INST: incb x0, #16
|
||||
// CHECK-ENCODING: [0x00,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #17
|
||||
// CHECK-INST: incb x0, #17
|
||||
// CHECK-ENCODING: [0x20,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #18
|
||||
// CHECK-INST: incb x0, #18
|
||||
// CHECK-ENCODING: [0x40,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #19
|
||||
// CHECK-INST: incb x0, #19
|
||||
// CHECK-ENCODING: [0x60,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #20
|
||||
// CHECK-INST: incb x0, #20
|
||||
// CHECK-ENCODING: [0x80,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #21
|
||||
// CHECK-INST: incb x0, #21
|
||||
// CHECK-ENCODING: [0xa0,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #22
|
||||
// CHECK-INST: incb x0, #22
|
||||
// CHECK-ENCODING: [0xc0,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #23
|
||||
// CHECK-INST: incb x0, #23
|
||||
// CHECK-ENCODING: [0xe0,0xe2,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e2 30 04 <unknown>
|
||||
|
||||
incb x0, #24
|
||||
// CHECK-INST: incb x0, #24
|
||||
// CHECK-ENCODING: [0x00,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e3 30 04 <unknown>
|
||||
|
||||
incb x0, #25
|
||||
// CHECK-INST: incb x0, #25
|
||||
// CHECK-ENCODING: [0x20,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e3 30 04 <unknown>
|
||||
|
||||
incb x0, #26
|
||||
// CHECK-INST: incb x0, #26
|
||||
// CHECK-ENCODING: [0x40,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e3 30 04 <unknown>
|
||||
|
||||
incb x0, #27
|
||||
// CHECK-INST: incb x0, #27
|
||||
// CHECK-ENCODING: [0x60,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e3 30 04 <unknown>
|
||||
|
||||
incb x0, #28
|
||||
// CHECK-INST: incb x0, #28
|
||||
// CHECK-ENCODING: [0x80,0xe3,0x30,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e3 30 04 <unknown>
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid result register
|
||||
|
||||
incd w0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: incd w0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incd sp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: incd sp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Immediate not compatible with encode/decode function.
|
||||
|
||||
incd x0, all, mul #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incd x0, all, mul #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incd x0, all, mul #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incd x0, all, mul #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incd x0, all, mul #17
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incd x0, all, mul #17
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid predicate patterns
|
||||
|
||||
incd x0, vl512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incd x0, vl512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incd x0, vl9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incd x0, vl9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incd x0, #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incd x0, #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incd x0, #32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incd x0, #32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
incd x0
|
||||
// CHECK-INST: incd x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 f0 04 <unknown>
|
||||
|
||||
incd x0, all
|
||||
// CHECK-INST: incd x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 f0 04 <unknown>
|
||||
|
||||
incd x0, all, mul #1
|
||||
// CHECK-INST: incd x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 f0 04 <unknown>
|
||||
|
||||
incd x0, all, mul #16
|
||||
// CHECK-INST: incd x0, all, mul #16
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xff,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 ff 04 <unknown>
|
||||
|
||||
incd x0, pow2
|
||||
// CHECK-INST: incd x0, pow2
|
||||
// CHECK-ENCODING: [0x00,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl1
|
||||
// CHECK-INST: incd x0, vl1
|
||||
// CHECK-ENCODING: [0x20,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl2
|
||||
// CHECK-INST: incd x0, vl2
|
||||
// CHECK-ENCODING: [0x40,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl3
|
||||
// CHECK-INST: incd x0, vl3
|
||||
// CHECK-ENCODING: [0x60,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl4
|
||||
// CHECK-INST: incd x0, vl4
|
||||
// CHECK-ENCODING: [0x80,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl5
|
||||
// CHECK-INST: incd x0, vl5
|
||||
// CHECK-ENCODING: [0xa0,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl6
|
||||
// CHECK-INST: incd x0, vl6
|
||||
// CHECK-ENCODING: [0xc0,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl7
|
||||
// CHECK-INST: incd x0, vl7
|
||||
// CHECK-ENCODING: [0xe0,0xe0,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e0 f0 04 <unknown>
|
||||
|
||||
incd x0, vl8
|
||||
// CHECK-INST: incd x0, vl8
|
||||
// CHECK-ENCODING: [0x00,0xe1,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e1 f0 04 <unknown>
|
||||
|
||||
incd x0, vl16
|
||||
// CHECK-INST: incd x0, vl16
|
||||
// CHECK-ENCODING: [0x20,0xe1,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e1 f0 04 <unknown>
|
||||
|
||||
incd x0, vl32
|
||||
// CHECK-INST: incd x0, vl32
|
||||
// CHECK-ENCODING: [0x40,0xe1,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e1 f0 04 <unknown>
|
||||
|
||||
incd x0, vl64
|
||||
// CHECK-INST: incd x0, vl64
|
||||
// CHECK-ENCODING: [0x60,0xe1,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e1 f0 04 <unknown>
|
||||
|
||||
incd x0, vl128
|
||||
// CHECK-INST: incd x0, vl128
|
||||
// CHECK-ENCODING: [0x80,0xe1,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e1 f0 04 <unknown>
|
||||
|
||||
incd x0, vl256
|
||||
// CHECK-INST: incd x0, vl256
|
||||
// CHECK-ENCODING: [0xa0,0xe1,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e1 f0 04 <unknown>
|
||||
|
||||
incd x0, #14
|
||||
// CHECK-INST: incd x0, #14
|
||||
// CHECK-ENCODING: [0xc0,0xe1,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e1 f0 04 <unknown>
|
||||
|
||||
incd x0, #28
|
||||
// CHECK-INST: incd x0, #28
|
||||
// CHECK-ENCODING: [0x80,0xe3,0xf0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e3 f0 04 <unknown>
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid result register
|
||||
|
||||
inch w0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: inch w0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
inch sp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: inch sp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Immediate not compatible with encode/decode function.
|
||||
|
||||
inch x0, all, mul #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: inch x0, all, mul #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
inch x0, all, mul #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: inch x0, all, mul #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
inch x0, all, mul #17
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: inch x0, all, mul #17
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid predicate patterns
|
||||
|
||||
inch x0, vl512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: inch x0, vl512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
inch x0, vl9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: inch x0, vl9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
inch x0, #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: inch x0, #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
inch x0, #32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: inch x0, #32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
inch x0
|
||||
// CHECK-INST: inch x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 70 04 <unknown>
|
||||
|
||||
inch x0, all
|
||||
// CHECK-INST: inch x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 70 04 <unknown>
|
||||
|
||||
inch x0, all, mul #1
|
||||
// CHECK-INST: inch x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 70 04 <unknown>
|
||||
|
||||
inch x0, all, mul #16
|
||||
// CHECK-INST: inch x0, all, mul #16
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0x7f,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 7f 04 <unknown>
|
||||
|
||||
inch x0, pow2
|
||||
// CHECK-INST: inch x0, pow2
|
||||
// CHECK-ENCODING: [0x00,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl1
|
||||
// CHECK-INST: inch x0, vl1
|
||||
// CHECK-ENCODING: [0x20,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl2
|
||||
// CHECK-INST: inch x0, vl2
|
||||
// CHECK-ENCODING: [0x40,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl3
|
||||
// CHECK-INST: inch x0, vl3
|
||||
// CHECK-ENCODING: [0x60,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl4
|
||||
// CHECK-INST: inch x0, vl4
|
||||
// CHECK-ENCODING: [0x80,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl5
|
||||
// CHECK-INST: inch x0, vl5
|
||||
// CHECK-ENCODING: [0xa0,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl6
|
||||
// CHECK-INST: inch x0, vl6
|
||||
// CHECK-ENCODING: [0xc0,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl7
|
||||
// CHECK-INST: inch x0, vl7
|
||||
// CHECK-ENCODING: [0xe0,0xe0,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e0 70 04 <unknown>
|
||||
|
||||
inch x0, vl8
|
||||
// CHECK-INST: inch x0, vl8
|
||||
// CHECK-ENCODING: [0x00,0xe1,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e1 70 04 <unknown>
|
||||
|
||||
inch x0, vl16
|
||||
// CHECK-INST: inch x0, vl16
|
||||
// CHECK-ENCODING: [0x20,0xe1,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e1 70 04 <unknown>
|
||||
|
||||
inch x0, vl32
|
||||
// CHECK-INST: inch x0, vl32
|
||||
// CHECK-ENCODING: [0x40,0xe1,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e1 70 04 <unknown>
|
||||
|
||||
inch x0, vl64
|
||||
// CHECK-INST: inch x0, vl64
|
||||
// CHECK-ENCODING: [0x60,0xe1,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e1 70 04 <unknown>
|
||||
|
||||
inch x0, vl128
|
||||
// CHECK-INST: inch x0, vl128
|
||||
// CHECK-ENCODING: [0x80,0xe1,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e1 70 04 <unknown>
|
||||
|
||||
inch x0, vl256
|
||||
// CHECK-INST: inch x0, vl256
|
||||
// CHECK-ENCODING: [0xa0,0xe1,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e1 70 04 <unknown>
|
||||
|
||||
inch x0, #14
|
||||
// CHECK-INST: inch x0, #14
|
||||
// CHECK-ENCODING: [0xc0,0xe1,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e1 70 04 <unknown>
|
||||
|
||||
inch x0, #28
|
||||
// CHECK-INST: inch x0, #28
|
||||
// CHECK-ENCODING: [0x80,0xe3,0x70,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e3 70 04 <unknown>
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid result register
|
||||
|
||||
incw w0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: incw w0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incw sp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: incw sp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Immediate not compatible with encode/decode function.
|
||||
|
||||
incw x0, all, mul #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incw x0, all, mul #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incw x0, all, mul #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incw x0, all, mul #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incw x0, all, mul #17
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
|
||||
// CHECK-NEXT: incw x0, all, mul #17
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// ------------------------------------------------------------------------- //
|
||||
// Invalid predicate patterns
|
||||
|
||||
incw x0, vl512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incw x0, vl512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incw x0, vl9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incw x0, vl9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incw x0, #-1
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incw x0, #-1
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
incw x0, #32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
|
||||
// CHECK-NEXT: incw x0, #32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
|
||||
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
|
||||
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
|
||||
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
|
||||
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
|
||||
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
|
||||
|
||||
incw x0
|
||||
// CHECK-INST: incw x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 b0 04 <unknown>
|
||||
|
||||
incw x0, all
|
||||
// CHECK-INST: incw x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 b0 04 <unknown>
|
||||
|
||||
incw x0, all, mul #1
|
||||
// CHECK-INST: incw x0
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 b0 04 <unknown>
|
||||
|
||||
incw x0, all, mul #16
|
||||
// CHECK-INST: incw x0, all, mul #16
|
||||
// CHECK-ENCODING: [0xe0,0xe3,0xbf,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e3 bf 04 <unknown>
|
||||
|
||||
incw x0, pow2
|
||||
// CHECK-INST: incw x0, pow2
|
||||
// CHECK-ENCODING: [0x00,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl1
|
||||
// CHECK-INST: incw x0, vl1
|
||||
// CHECK-ENCODING: [0x20,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl2
|
||||
// CHECK-INST: incw x0, vl2
|
||||
// CHECK-ENCODING: [0x40,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl3
|
||||
// CHECK-INST: incw x0, vl3
|
||||
// CHECK-ENCODING: [0x60,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl4
|
||||
// CHECK-INST: incw x0, vl4
|
||||
// CHECK-ENCODING: [0x80,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl5
|
||||
// CHECK-INST: incw x0, vl5
|
||||
// CHECK-ENCODING: [0xa0,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl6
|
||||
// CHECK-INST: incw x0, vl6
|
||||
// CHECK-ENCODING: [0xc0,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl7
|
||||
// CHECK-INST: incw x0, vl7
|
||||
// CHECK-ENCODING: [0xe0,0xe0,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 e0 b0 04 <unknown>
|
||||
|
||||
incw x0, vl8
|
||||
// CHECK-INST: incw x0, vl8
|
||||
// CHECK-ENCODING: [0x00,0xe1,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 e1 b0 04 <unknown>
|
||||
|
||||
incw x0, vl16
|
||||
// CHECK-INST: incw x0, vl16
|
||||
// CHECK-ENCODING: [0x20,0xe1,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 e1 b0 04 <unknown>
|
||||
|
||||
incw x0, vl32
|
||||
// CHECK-INST: incw x0, vl32
|
||||
// CHECK-ENCODING: [0x40,0xe1,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 40 e1 b0 04 <unknown>
|
||||
|
||||
incw x0, vl64
|
||||
// CHECK-INST: incw x0, vl64
|
||||
// CHECK-ENCODING: [0x60,0xe1,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 60 e1 b0 04 <unknown>
|
||||
|
||||
incw x0, vl128
|
||||
// CHECK-INST: incw x0, vl128
|
||||
// CHECK-ENCODING: [0x80,0xe1,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e1 b0 04 <unknown>
|
||||
|
||||
incw x0, vl256
|
||||
// CHECK-INST: incw x0, vl256
|
||||
// CHECK-ENCODING: [0xa0,0xe1,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 e1 b0 04 <unknown>
|
||||
|
||||
incw x0, #14
|
||||
// CHECK-INST: incw x0, #14
|
||||
// CHECK-ENCODING: [0xc0,0xe1,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c0 e1 b0 04 <unknown>
|
||||
|
||||
incw x0, #28
|
||||
// CHECK-INST: incw x0, #28
|
||||
// CHECK-ENCODING: [0x80,0xe3,0xb0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 80 e3 b0 04 <unknown>
|
||||
Loading…
Reference in New Issue