forked from OSchip/llvm-project
rename SelectScalarSSELoad -> SelectScalarSSELoadXXX and rewrite
it to follow the mode needed by the new isel. Instead of returning the input and output chains, it just returns the (currently only one, which is a silly limitation) node that has input and output chains. Since we want the old thing to still work, add a new SelectScalarSSELoad to emulate the old interface. The XXX suffix and the wrapper will eventually go away. llvm-svn: 96715
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parent
98b99aa401
commit
18a32ce0f3
llvm/lib/Target/X86
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@ -209,12 +209,26 @@ namespace {
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SDValue &Scale, SDValue &Index, SDValue &Disp);
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bool SelectTLSADDRAddr(SDNode *Op, SDValue N, SDValue &Base,
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SDValue &Scale, SDValue &Index, SDValue &Disp);
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bool SelectScalarSSELoad(SDNode *Root, SDValue N,
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bool SelectScalarSSELoadXXX(SDNode *Root, SDValue N,
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SDValue &Base, SDValue &Scale,
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SDValue &Index, SDValue &Disp,
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SDValue &Segment,
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SDValue &NodeWithChain);
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// FIXME: Remove this hacky wrapper.
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bool SelectScalarSSELoad(SDNode *Root, SDValue N, SDValue &Base,
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SDValue &Scale, SDValue &Index,
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SDValue &Disp, SDValue &Segment,
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SDValue &PatternChainResult,
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SDValue &PatternInputChain);
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SDValue &PatternInputChain) {
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SDValue Tmp;
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if (!SelectScalarSSELoadXXX(Root, N, Base, Scale, Index, Disp, Segment,
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Tmp))
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return false;
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PatternInputChain = Tmp.getOperand(0);
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PatternChainResult = Tmp.getValue(1);
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return true;
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}
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bool TryFoldLoad(SDNode *P, SDValue N,
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SDValue &Base, SDValue &Scale,
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SDValue &Index, SDValue &Disp,
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@ -1320,26 +1334,23 @@ bool X86DAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base,
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/// is derived from the type of N, which is either v4f32 or v2f64.
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///
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/// We also return:
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/// PatternInputChain: this is the chain node input to the pattern that the
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/// newly selected instruction should use.
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/// PatternChainResult: this is chain result matched by the pattern which
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/// should be replaced with the chain result of the matched node.
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bool X86DAGToDAGISel::SelectScalarSSELoad(SDNode *Root,
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/// PatternChainNode: this is the matched node that has a chain input and
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/// output.
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bool X86DAGToDAGISel::SelectScalarSSELoadXXX(SDNode *Root,
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SDValue N, SDValue &Base,
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SDValue &Scale, SDValue &Index,
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SDValue &Disp, SDValue &Segment,
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SDValue &PatternChainResult,
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SDValue &PatternInputChain) {
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SDValue &PatternNodeWithChain) {
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if (N.getOpcode() == ISD::SCALAR_TO_VECTOR) {
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PatternChainResult = N.getOperand(0).getValue(1);
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if (ISD::isNON_EXTLoad(PatternChainResult.getNode()) &&
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PatternChainResult.getValue(0).hasOneUse() &&
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IsProfitableToFold(N.getOperand(0),PatternChainResult.getNode(),Root) &&
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IsLegalToFold(N.getOperand(0), N.getNode(), Root)) {
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LoadSDNode *LD = cast<LoadSDNode>(PatternChainResult);
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PatternNodeWithChain = N.getOperand(0);
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if (ISD::isNON_EXTLoad(PatternNodeWithChain.getNode()) &&
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PatternNodeWithChain.hasOneUse() &&
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IsProfitableToFold(N.getOperand(0), PatternNodeWithChain.getNode(),
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Root) &&
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IsLegalToFold(N.getOperand(0), PatternNodeWithChain.getNode(), Root)) {
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LoadSDNode *LD = cast<LoadSDNode>(PatternNodeWithChain);
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if (!SelectAddr(Root, LD->getBasePtr(), Base, Scale, Index, Disp,Segment))
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return false;
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PatternInputChain = LD->getChain();
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return true;
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}
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}
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@ -1358,8 +1369,7 @@ bool X86DAGToDAGISel::SelectScalarSSELoad(SDNode *Root,
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LoadSDNode *LD = cast<LoadSDNode>(N.getOperand(0).getOperand(0));
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if (!SelectAddr(Root, LD->getBasePtr(), Base, Scale, Index, Disp, Segment))
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return false;
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PatternInputChain = LD->getChain();
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PatternChainResult = SDValue(LD, 1);
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PatternNodeWithChain = SDValue(LD, 0);
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return true;
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}
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return false;
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