[TTI] Replace ceil lambdas with divideCeil. NFCI

As pointed out in D101726, this function already exists in MathExtras.
It uses different types, but with the values used here I believe that
should not make a functional difference.
This commit is contained in:
David Green 2021-05-04 09:04:44 +01:00
parent 97f4789c38
commit 18883a3fec
2 changed files with 3 additions and 9 deletions

View File

@ -1154,9 +1154,6 @@ public:
unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy); unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
unsigned VecTyLTSize = VecTyLT.getStoreSize(); unsigned VecTyLTSize = VecTyLT.getStoreSize();
// Return the ceiling of dividing A by B.
auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
// Scale the cost of the memory operation by the fraction of legalized // Scale the cost of the memory operation by the fraction of legalized
// instructions that will actually be used. We shouldn't account for the // instructions that will actually be used. We shouldn't account for the
// cost of dead instructions since they will be removed. // cost of dead instructions since they will be removed.
@ -1174,11 +1171,11 @@ public:
if (Opcode == Instruction::Load && VecTySize > VecTyLTSize) { if (Opcode == Instruction::Load && VecTySize > VecTyLTSize) {
// The number of loads of a legal type it will take to represent a load // The number of loads of a legal type it will take to represent a load
// of the unlegalized vector type. // of the unlegalized vector type.
unsigned NumLegalInsts = ceil(VecTySize, VecTyLTSize); unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
// The number of elements of the unlegalized type that correspond to a // The number of elements of the unlegalized type that correspond to a
// single legal instruction. // single legal instruction.
unsigned NumEltsPerLegalInst = ceil(NumElts, NumLegalInsts); unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
// Determine which legal instructions will be used. // Determine which legal instructions will be used.
BitVector UsedInsts(NumLegalInsts, false); BitVector UsedInsts(NumLegalInsts, false);

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@ -1145,9 +1145,6 @@ InstructionCost SystemZTTIImpl::getInterleavedMemoryOpCost(
assert(isa<VectorType>(VecTy) && assert(isa<VectorType>(VecTy) &&
"Expect a vector type for interleaved memory op"); "Expect a vector type for interleaved memory op");
// Return the ceiling of dividing A by B.
auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
unsigned NumElts = cast<FixedVectorType>(VecTy)->getNumElements(); unsigned NumElts = cast<FixedVectorType>(VecTy)->getNumElements();
assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor"); assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
unsigned VF = NumElts / Factor; unsigned VF = NumElts / Factor;
@ -1174,7 +1171,7 @@ InstructionCost SystemZTTIImpl::getInterleavedMemoryOpCost(
// requires one operation, except that vperm can handle two input // requires one operation, except that vperm can handle two input
// registers first time for each dst vector. // registers first time for each dst vector.
unsigned NumSrcVecs = ValueVecs[Index].count(); unsigned NumSrcVecs = ValueVecs[Index].count();
unsigned NumDstVecs = ceil(VF * getScalarSizeInBits(VecTy), 128U); unsigned NumDstVecs = divideCeil(VF * getScalarSizeInBits(VecTy), 128U);
assert (NumSrcVecs >= NumDstVecs && "Expected at least as many sources"); assert (NumSrcVecs >= NumDstVecs && "Expected at least as many sources");
NumPermutes += std::max(1U, NumSrcVecs - NumDstVecs); NumPermutes += std::max(1U, NumSrcVecs - NumDstVecs);
} }