forked from OSchip/llvm-project
[TTI] Replace ceil lambdas with divideCeil. NFCI
As pointed out in D101726, this function already exists in MathExtras. It uses different types, but with the values used here I believe that should not make a functional difference.
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@ -1154,9 +1154,6 @@ public:
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unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
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unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
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unsigned VecTyLTSize = VecTyLT.getStoreSize();
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unsigned VecTyLTSize = VecTyLT.getStoreSize();
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// Return the ceiling of dividing A by B.
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auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
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// Scale the cost of the memory operation by the fraction of legalized
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// Scale the cost of the memory operation by the fraction of legalized
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// instructions that will actually be used. We shouldn't account for the
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// instructions that will actually be used. We shouldn't account for the
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// cost of dead instructions since they will be removed.
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// cost of dead instructions since they will be removed.
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@ -1174,11 +1171,11 @@ public:
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if (Opcode == Instruction::Load && VecTySize > VecTyLTSize) {
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if (Opcode == Instruction::Load && VecTySize > VecTyLTSize) {
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// The number of loads of a legal type it will take to represent a load
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// The number of loads of a legal type it will take to represent a load
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// of the unlegalized vector type.
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// of the unlegalized vector type.
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unsigned NumLegalInsts = ceil(VecTySize, VecTyLTSize);
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unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
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// The number of elements of the unlegalized type that correspond to a
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// The number of elements of the unlegalized type that correspond to a
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// single legal instruction.
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// single legal instruction.
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unsigned NumEltsPerLegalInst = ceil(NumElts, NumLegalInsts);
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unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
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// Determine which legal instructions will be used.
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// Determine which legal instructions will be used.
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BitVector UsedInsts(NumLegalInsts, false);
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BitVector UsedInsts(NumLegalInsts, false);
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@ -1145,9 +1145,6 @@ InstructionCost SystemZTTIImpl::getInterleavedMemoryOpCost(
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assert(isa<VectorType>(VecTy) &&
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assert(isa<VectorType>(VecTy) &&
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"Expect a vector type for interleaved memory op");
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"Expect a vector type for interleaved memory op");
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// Return the ceiling of dividing A by B.
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auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
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unsigned NumElts = cast<FixedVectorType>(VecTy)->getNumElements();
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unsigned NumElts = cast<FixedVectorType>(VecTy)->getNumElements();
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assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
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assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
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unsigned VF = NumElts / Factor;
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unsigned VF = NumElts / Factor;
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@ -1174,7 +1171,7 @@ InstructionCost SystemZTTIImpl::getInterleavedMemoryOpCost(
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// requires one operation, except that vperm can handle two input
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// requires one operation, except that vperm can handle two input
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// registers first time for each dst vector.
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// registers first time for each dst vector.
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unsigned NumSrcVecs = ValueVecs[Index].count();
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unsigned NumSrcVecs = ValueVecs[Index].count();
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unsigned NumDstVecs = ceil(VF * getScalarSizeInBits(VecTy), 128U);
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unsigned NumDstVecs = divideCeil(VF * getScalarSizeInBits(VecTy), 128U);
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assert (NumSrcVecs >= NumDstVecs && "Expected at least as many sources");
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assert (NumSrcVecs >= NumDstVecs && "Expected at least as many sources");
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NumPermutes += std::max(1U, NumSrcVecs - NumDstVecs);
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NumPermutes += std::max(1U, NumSrcVecs - NumDstVecs);
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}
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}
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