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The NEONPreAllocPass should never have to assign fixed registers anymore. 

This pass can go away entirely soon.

llvm-svn: 107892
This commit is contained in:
Bob Wilson 2010-07-08 17:45:26 +00:00
parent df69264765
commit 181e5af248
1 changed files with 1 additions and 34 deletions
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35
llvm/lib/Target/ARM/NEONPreAllocPass.cpp
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@ -468,40 +468,7 @@ bool NEONPreAllocPass::PreAllocNEONRegisters(MachineBasicBlock &MBB) {
continue;
if (FormsRegSequence(MI, FirstOpnd, NumRegs, Offset, Stride))
continue;
MachineBasicBlock::iterator NextI = llvm::next(MBBI);
for (unsigned R = 0; R < NumRegs; ++R) {
MachineOperand &MO = MI->getOperand(FirstOpnd + R);
assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand");
unsigned VirtReg = MO.getReg();
assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
"expected a virtual register");
// For now, just assign a fixed set of adjacent registers.
// This leaves plenty of room for future improvements.
static const unsigned NEONDRegs[] = {
ARM::D0, ARM::D1, ARM::D2, ARM::D3,
ARM::D4, ARM::D5, ARM::D6, ARM::D7
};
MO.setReg(NEONDRegs[Offset + R * Stride]);
if (MO.isUse()) {
// Insert a copy from VirtReg.
TII->copyRegToReg(MBB, MBBI, MO.getReg(), VirtReg,
ARM::DPRRegisterClass, ARM::DPRRegisterClass,
DebugLoc());
if (MO.isKill()) {
MachineInstr *CopyMI = prior(MBBI);
CopyMI->findRegisterUseOperand(VirtReg)->setIsKill();
}
MO.setIsKill();
} else if (MO.isDef() && !MO.isDead()) {
// Add a copy to VirtReg.
TII->copyRegToReg(MBB, NextI, VirtReg, MO.getReg(),
ARM::DPRRegisterClass, ARM::DPRRegisterClass,
DebugLoc());
}
}
llvm_unreachable("expected a REG_SEQUENCE");
}
return Modified;