forked from OSchip/llvm-project
[ELF] Fix ARM and Thumb V7PILongThunk overflow behavior.
When the range between the source and target of a V7PILongThunk exceeded an int32 we would trigger a relocation out of range error for the R_ARM_MOVT_PREL or R_ARM_THM_MOVT_PREL relocation. This case can happen when linking the linux kernel as it is loaded above 0xf0000000. There are two parts to the fix. - Remove the overflow check for R_ARM_MOVT_PREL or R_ARM_THM_MOVT_PREL. The ELF for the ARM Architecture document defines these relocations as having no overflow checking so the check was spurious. - Use int64_t for the offset calculation, in line with similar thunks so that PC + (S - P) < 32-bits. This results in less surprising disassembly. Differential Revision: https://reviews.llvm.org/D56396 llvm-svn: 350836
This commit is contained in:
Peter Smith
parent
62df5eed16
commit
1811e48b7b
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@ -491,14 +491,12 @@ void ARM::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
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break;
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case R_ARM_MOVT_ABS:
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case R_ARM_MOVT_PREL:
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checkInt(Loc, Val, 32, Type);
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write32le(Loc, (read32le(Loc) & ~0x000f0fff) |
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(((Val >> 16) & 0xf000) << 4) | ((Val >> 16) & 0xfff));
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break;
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case R_ARM_THM_MOVT_ABS:
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case R_ARM_THM_MOVT_PREL:
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// Encoding T1: A = imm4:i:imm3:imm8
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checkInt(Loc, Val, 32, Type);
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write16le(Loc,
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0xf2c0 | // opcode
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((Val >> 17) & 0x0400) | // i
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@ -484,7 +484,7 @@ void ARMV7PILongThunk::writeLong(uint8_t *Buf) {
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};
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uint64_t S = getARMThunkDestVA(Destination);
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uint64_t P = getThunkTargetSym()->getVA();
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uint64_t Offset = S - P - 16;
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int64_t Offset = S - P - 16;
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memcpy(Buf, Data, sizeof(Data));
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Target->relocateOne(Buf, R_ARM_MOVW_PREL_NC, Offset);
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Target->relocateOne(Buf + 4, R_ARM_MOVT_PREL, Offset);
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@ -505,7 +505,7 @@ void ThumbV7PILongThunk::writeLong(uint8_t *Buf) {
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};
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uint64_t S = getARMThunkDestVA(Destination);
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uint64_t P = getThunkTargetSym()->getVA() & ~0x1;
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uint64_t Offset = S - P - 12;
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int64_t Offset = S - P - 12;
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memcpy(Buf, Data, sizeof(Data));
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Target->relocateOne(Buf, R_ARM_THM_MOVW_PREL_NC, Offset);
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Target->relocateOne(Buf + 4, R_ARM_THM_MOVT_PREL, Offset);
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@ -0,0 +1,82 @@
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// REQUIRES: arm
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
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// RUN: echo "SECTIONS {" > %t.script
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// RUN: echo " .text_low 0x130 : { *(.text) }" >> %t.script
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// RUN: echo " .text_high 0xf0000000 : AT(0x1000) { *(.text_high) }" >> %t.script
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// RUN: echo " } " >> %t.script
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// RUN: ld.lld --script %t.script --pie --static %t -o %t2 2>&1
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// RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t3
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// RUN: ld.lld --script %t.script --pie %t3 -o %t4 2>&1
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// RUN: llvm-objdump -d -triple=thumbv7a-none-linux-gnueabi %t4 | FileCheck -check-prefix=CHECK-THUMB %s
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// Check that we can create Arm and Thumb v7a Position Independent Thunks that
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// can span the address space without triggering overflow errors. We use an
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// AT(0x1000) for .text_high to avoid creating an almost 4Gb size file.
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.syntax unified
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.text
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.global _start
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.type _start, %function
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_start:
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bl high
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bx lr
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.section .text_high, "ax", %progbits
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.global high
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.type high, %function
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high:
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bl _start
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bx lr
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// ARMv7a instructions and relocations.
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// CHECK: Disassembly of section .text_low:
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// CHECK-NEXT: _start:
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// CHECK-NEXT: 130: 00 00 00 eb bl #0 <__ARMV7PILongThunk_high>
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// CHECK-NEXT: 134: 1e ff 2f e1 bx lr
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// CHECK: __ARMV7PILongThunk_high:
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// CHECK-NEXT: 138: b8 ce 0f e3 movw r12, #65208
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// CHECK-NEXT: 13c: ff cf 4e e3 movt r12, #61439
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// 0x140 + 0xEFFF0000 + 0x0000FEB8 + 8 = 0xf0000000 = high
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// CHECK-NEXT: 140: 0f c0 8c e0 add r12, r12, pc
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// CHECK-NEXT: 144: 1c ff 2f e1 bx r12
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// CHECK: Disassembly of section .text_high:
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// CHECK-NEXT: high:
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// CHECK-NEXT: f0000000: 00 00 00 eb bl #0 <__ARMV7PILongThunk__start>
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// CHECK-NEXT: f0000004: 1e ff 2f e1 bx lr
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// CHECK: __ARMV7PILongThunk__start:
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// CHECK-NEXT: f0000008: 18 c1 00 e3 movw r12, #280
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// CHECK-NEXT: f000000c: 00 c0 41 e3 movt r12, #4096
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// 0xf0000010 + 0x10000000 + 0x0000118 + 8 = bits32(0x100000130),0x130 = _start
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// CHECK-NEXT: f0000010: 0f c0 8c e0 add r12, r12, pc
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// CHECK-NEXT: f0000014: 1c ff 2f e1 bx r12
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// Thumbv7a instructions and relocations
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// CHECK-THUMB: Disassembly of section .text_low:
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// CHECK-THUMB-NEXT: _start:
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// CHECK-THUMB-NEXT: 130: 00 f0 02 f8 bl #4
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// CHECK-THUMB-NEXT: 134: 70 47 bx lr
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// CHECK-THUMB-NEXT: 136: d4 d4 bmi #-88
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// CHECK-THUMB: __ThumbV7PILongThunk_high:
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// CHECK-THUMB-NEXT: 138: 4f f6 bd 6c movw r12, #65213
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// CHECK-THUMB-NEXT: 13c: ce f6 ff 7c movt r12, #61439
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// 0x140 + 0xEFFF0000 + 0x0000FEBD + 4 = 0xf0000001 = high
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// CHECK-THUMB-NEXT: 140: fc 44 add r12, pc
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// CHECK-THUMB-NEXT: 142: 60 47 bx r12
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// CHECK-THUMB: Disassembly of section .text_high:
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// CHECK-THUMB-NEXT: high:
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// CHECK-THUMB-NEXT: f0000000: 00 f0 02 f8 bl #4
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// CHECK-THUMB-NEXT: f0000004: 70 47 bx lr
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// CHECK-THUMB: __ThumbV7PILongThunk__start:
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// CHECK-THUMB-NEXT: f0000008: 40 f2 1d 1c movw r12, #285
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// CHECK-THUMB-NEXT: f000000c: c1 f2 00 0c movt r12, #4096
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// 0xf0000010 + 0x10000000 + 0x000011d +4 = bits32(0x100000131),0x131 = _start
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// CHECK-THUMB-NEXT: f0000010: fc 44 add r12, pc
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// CHECK-THUMB-NEXT: f0000012: 60 47 bx r12
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