forked from OSchip/llvm-project
parent
b93cd18a82
commit
17847ae757
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@ -1328,7 +1328,7 @@ bool ARMFastISel::SelectSIToFP(const Instruction *I) {
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unsigned Opc;
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if (Ty->isFloatTy()) Opc = ARM::VSITOS;
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else if (Ty->isDoubleTy()) Opc = ARM::VSITOD;
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else return 0;
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else return false;
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unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT));
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
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@ -1354,7 +1354,7 @@ bool ARMFastISel::SelectFPToSI(const Instruction *I) {
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Type *OpTy = I->getOperand(0)->getType();
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if (OpTy->isFloatTy()) Opc = ARM::VTOSIZS;
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else if (OpTy->isDoubleTy()) Opc = ARM::VTOSIZD;
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else return 0;
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else return false;
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// f64->s32 or f32->s32 both need an intermediate f32 reg.
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unsigned ResultReg = createResultReg(TLI.getRegClassFor(MVT::f32));
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