forked from OSchip/llvm-project
Better comments to explain buffered/unbuffered processor resources.
llvm-svn: 206625
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@ -699,10 +699,14 @@ void ScheduleDAGInstrs::initSUnits() {
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// Assign the Latency field of SU using target-provided information.
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// Assign the Latency field of SU using target-provided information.
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SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());
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SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());
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// If this SUnit uses an unbuffered resource, mark it as such.
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// If this SUnit uses a reserved or unbuffered resource, mark it as such.
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// These resources are used for in-order execution pipelines within an
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//
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// out-of-order core and are identified by BufferSize=1. BufferSize=0 is
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// Reserved resources block an instruction from issueing and stall the
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// used for dispatch/issue groups and is not considered here.
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// entire pipeline. These are identified by BufferSize=0.
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//
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// Unbuffered resources prevent execution of subsequeny instructions that
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// require the same resources. This is used for in-order execution pipelines
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// within an out-of-order core. These are identified by BufferSize=1.
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if (SchedModel.hasInstrSchedModel()) {
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if (SchedModel.hasInstrSchedModel()) {
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const MCSchedClassDesc *SC = getSchedClass(SU);
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const MCSchedClassDesc *SC = getSchedClass(SU);
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for (TargetSchedModel::ProcResIter
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for (TargetSchedModel::ProcResIter
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