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Use ZERO_EXTEND instead of ANY_EXTEND when promoting 

shift amounts, to avoid implicitly assuming that
target architectures will ignore the high bits.

llvm-svn: 63169
This commit is contained in:
Dan Gohman 2009-01-28 02:58:31 +00:00
parent 5d1ebe90b3
commit 172ad92b29
2 changed files with 2 additions and 2 deletions
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2
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -974,7 +974,7 @@ SDValue SelectionDAGLegalize::LegalizeShiftAmount(SDValue ShiftAmt) {
return DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), ShiftAmt); return DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), ShiftAmt);
if (TLI.getShiftAmountTy().bitsGT(ShiftAmt.getValueType())) if (TLI.getShiftAmountTy().bitsGT(ShiftAmt.getValueType()))
return DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), ShiftAmt); return DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), ShiftAmt);
return ShiftAmt; return ShiftAmt;
} }

2
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
View File

@ -114,7 +114,7 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_ShiftOp(SDNode *N) {
if (TLI.getShiftAmountTy().bitsLT(ShiftAmt.getValueType())) if (TLI.getShiftAmountTy().bitsLT(ShiftAmt.getValueType()))
ShiftAmt = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), ShiftAmt); ShiftAmt = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), ShiftAmt);
else if (TLI.getShiftAmountTy().bitsGT(ShiftAmt.getValueType())) else if (TLI.getShiftAmountTy().bitsGT(ShiftAmt.getValueType()))
ShiftAmt = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), ShiftAmt); ShiftAmt = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), ShiftAmt);
return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, ShiftAmt); return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, ShiftAmt);
} }