forked from OSchip/llvm-project
Use ZERO_EXTEND instead of ANY_EXTEND when promoting
shift amounts, to avoid implicitly assuming that target architectures will ignore the high bits. llvm-svn: 63169
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5d1ebe90b3
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172ad92b29
llvm/lib/CodeGen/SelectionDAG
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@ -974,7 +974,7 @@ SDValue SelectionDAGLegalize::LegalizeShiftAmount(SDValue ShiftAmt) {
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return DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), ShiftAmt);
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if (TLI.getShiftAmountTy().bitsGT(ShiftAmt.getValueType()))
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return DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), ShiftAmt);
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return DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), ShiftAmt);
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return ShiftAmt;
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}
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@ -114,7 +114,7 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_ShiftOp(SDNode *N) {
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if (TLI.getShiftAmountTy().bitsLT(ShiftAmt.getValueType()))
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ShiftAmt = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), ShiftAmt);
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else if (TLI.getShiftAmountTy().bitsGT(ShiftAmt.getValueType()))
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ShiftAmt = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), ShiftAmt);
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ShiftAmt = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), ShiftAmt);
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return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, ShiftAmt);
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}
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