forked from OSchip/llvm-project
[X86] Move the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp
Previously we had to specify the forward and backwards feature dependencies separately which was error prone. And as dependencies have gotten more complex it was hard to be sure the transitive dependencies were handled correctly. The way it was written was also not super readable. This patch replaces everything with a table that lists what features a feature is dependent on directly. Then we can recursively walk through the table to find the transitive dependencies. This is largely based on how we handle subtarget features in the MC layer from the tablegen descriptions. Differential Revision: https://reviews.llvm.org/D83273
This commit is contained in:
Craig Topper
parent
094e99d264
commit
16f3d698f2
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@ -145,155 +145,6 @@ bool X86TargetInfo::initFeatureMap(
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return true;
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}
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void X86TargetInfo::setSSELevel(llvm::StringMap<bool> &Features,
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X86SSEEnum Level, bool Enabled) {
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if (Enabled) {
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switch (Level) {
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case AVX512F:
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Features["avx512f"] = true;
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Features["fma"] = true;
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Features["f16c"] = true;
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LLVM_FALLTHROUGH;
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case AVX2:
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Features["avx2"] = true;
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LLVM_FALLTHROUGH;
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case AVX:
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Features["avx"] = true;
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LLVM_FALLTHROUGH;
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case SSE42:
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Features["sse4.2"] = true;
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LLVM_FALLTHROUGH;
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case SSE41:
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Features["sse4.1"] = true;
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LLVM_FALLTHROUGH;
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case SSSE3:
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Features["ssse3"] = true;
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LLVM_FALLTHROUGH;
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case SSE3:
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Features["sse3"] = true;
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LLVM_FALLTHROUGH;
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case SSE2:
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Features["sse2"] = true;
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LLVM_FALLTHROUGH;
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case SSE1:
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Features["sse"] = true;
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LLVM_FALLTHROUGH;
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case NoSSE:
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break;
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}
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return;
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}
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switch (Level) {
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case NoSSE:
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case SSE1:
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Features["sse"] = false;
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LLVM_FALLTHROUGH;
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case SSE2:
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Features["sse2"] = Features["pclmul"] = Features["aes"] = false;
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Features["sha"] = Features["gfni"] = false;
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LLVM_FALLTHROUGH;
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case SSE3:
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Features["sse3"] = false;
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setXOPLevel(Features, NoXOP, false);
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LLVM_FALLTHROUGH;
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case SSSE3:
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Features["ssse3"] = false;
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LLVM_FALLTHROUGH;
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case SSE41:
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Features["sse4.1"] = false;
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LLVM_FALLTHROUGH;
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case SSE42:
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Features["sse4.2"] = false;
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LLVM_FALLTHROUGH;
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case AVX:
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Features["fma"] = Features["avx"] = Features["f16c"] = false;
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Features["vaes"] = Features["vpclmulqdq"] = false;
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setXOPLevel(Features, FMA4, false);
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LLVM_FALLTHROUGH;
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case AVX2:
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Features["avx2"] = false;
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LLVM_FALLTHROUGH;
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case AVX512F:
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Features["avx512f"] = Features["avx512cd"] = Features["avx512er"] = false;
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Features["avx512pf"] = Features["avx512dq"] = Features["avx512bw"] = false;
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Features["avx512vl"] = Features["avx512vbmi"] = false;
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Features["avx512ifma"] = Features["avx512vpopcntdq"] = false;
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Features["avx512bitalg"] = Features["avx512vnni"] = false;
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Features["avx512vbmi2"] = Features["avx512bf16"] = false;
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Features["avx512vp2intersect"] = false;
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break;
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}
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}
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void X86TargetInfo::setMMXLevel(llvm::StringMap<bool> &Features,
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MMX3DNowEnum Level, bool Enabled) {
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if (Enabled) {
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switch (Level) {
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case AMD3DNowAthlon:
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Features["3dnowa"] = true;
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LLVM_FALLTHROUGH;
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case AMD3DNow:
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Features["3dnow"] = true;
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LLVM_FALLTHROUGH;
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case MMX:
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Features["mmx"] = true;
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LLVM_FALLTHROUGH;
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case NoMMX3DNow:
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break;
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}
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return;
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}
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switch (Level) {
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case NoMMX3DNow:
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case MMX:
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Features["mmx"] = false;
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LLVM_FALLTHROUGH;
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case AMD3DNow:
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Features["3dnow"] = false;
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LLVM_FALLTHROUGH;
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case AMD3DNowAthlon:
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Features["3dnowa"] = false;
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break;
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}
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}
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void X86TargetInfo::setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum Level,
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bool Enabled) {
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if (Enabled) {
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switch (Level) {
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case XOP:
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Features["xop"] = true;
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LLVM_FALLTHROUGH;
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case FMA4:
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Features["fma4"] = true;
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setSSELevel(Features, AVX, true);
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LLVM_FALLTHROUGH;
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case SSE4A:
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Features["sse4a"] = true;
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setSSELevel(Features, SSE3, true);
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LLVM_FALLTHROUGH;
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case NoXOP:
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break;
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}
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return;
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}
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switch (Level) {
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case NoXOP:
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case SSE4A:
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Features["sse4a"] = false;
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LLVM_FALLTHROUGH;
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case FMA4:
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Features["fma4"] = false;
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LLVM_FALLTHROUGH;
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case XOP:
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Features["xop"] = false;
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break;
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}
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}
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void X86TargetInfo::setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
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StringRef Name, bool Enabled) {
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if (Name == "sse4") {
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@ -309,96 +160,10 @@ void X86TargetInfo::setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
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Features[Name] = Enabled;
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if (Name == "mmx") {
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setMMXLevel(Features, MMX, Enabled);
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} else if (Name == "sse") {
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setSSELevel(Features, SSE1, Enabled);
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} else if (Name == "sse2") {
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setSSELevel(Features, SSE2, Enabled);
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} else if (Name == "sse3") {
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setSSELevel(Features, SSE3, Enabled);
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} else if (Name == "ssse3") {
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setSSELevel(Features, SSSE3, Enabled);
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} else if (Name == "sse4.2") {
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setSSELevel(Features, SSE42, Enabled);
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} else if (Name == "sse4.1") {
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setSSELevel(Features, SSE41, Enabled);
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} else if (Name == "3dnow") {
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setMMXLevel(Features, AMD3DNow, Enabled);
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} else if (Name == "3dnowa") {
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setMMXLevel(Features, AMD3DNowAthlon, Enabled);
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} else if (Name == "aes") {
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if (Enabled)
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setSSELevel(Features, SSE2, Enabled);
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else
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Features["vaes"] = false;
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} else if (Name == "vaes") {
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if (Enabled) {
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setSSELevel(Features, AVX, Enabled);
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Features["aes"] = true;
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}
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} else if (Name == "pclmul") {
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if (Enabled)
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setSSELevel(Features, SSE2, Enabled);
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else
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Features["vpclmulqdq"] = false;
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} else if (Name == "vpclmulqdq") {
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if (Enabled) {
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setSSELevel(Features, AVX, Enabled);
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Features["pclmul"] = true;
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}
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} else if (Name == "gfni") {
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if (Enabled)
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setSSELevel(Features, SSE2, Enabled);
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} else if (Name == "avx") {
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setSSELevel(Features, AVX, Enabled);
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} else if (Name == "avx2") {
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setSSELevel(Features, AVX2, Enabled);
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} else if (Name == "avx512f") {
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setSSELevel(Features, AVX512F, Enabled);
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} else if (Name.startswith("avx512")) {
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if (Enabled)
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setSSELevel(Features, AVX512F, Enabled);
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// Enable BWI instruction if certain features are being enabled.
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if ((Name == "avx512vbmi" || Name == "avx512vbmi2" ||
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Name == "avx512bitalg" || Name == "avx512bf16") && Enabled)
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Features["avx512bw"] = true;
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// Also disable some features if BWI is being disabled.
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if (Name == "avx512bw" && !Enabled) {
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Features["avx512vbmi"] = false;
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Features["avx512vbmi2"] = false;
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Features["avx512bitalg"] = false;
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Features["avx512bf16"] = false;
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}
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} else if (Name == "fma") {
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if (Enabled)
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setSSELevel(Features, AVX, Enabled);
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else
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setSSELevel(Features, AVX512F, Enabled);
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} else if (Name == "fma4") {
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setXOPLevel(Features, FMA4, Enabled);
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} else if (Name == "xop") {
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setXOPLevel(Features, XOP, Enabled);
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} else if (Name == "sse4a") {
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setXOPLevel(Features, SSE4A, Enabled);
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} else if (Name == "f16c") {
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if (Enabled)
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setSSELevel(Features, AVX, Enabled);
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else
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setSSELevel(Features, AVX512F, Enabled);
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} else if (Name == "sha") {
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if (Enabled)
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setSSELevel(Features, SSE2, Enabled);
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} else if (Name == "xsave") {
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if (!Enabled)
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Features["xsaveopt"] = Features["xsavec"] = Features["xsaves"] = false;
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} else if (Name == "xsaveopt" || Name == "xsavec" || Name == "xsaves") {
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if (Enabled)
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Features["xsave"] = true;
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} else if (Name == "amx-tile" && !Enabled) {
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Features["amx-bf16"] = Features["amx-int8"] = false;
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} else if ((Name == "amx-bf16" || Name == "amx-int8") && Enabled)
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Features["amx-tile"] = true;
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SmallVector<StringRef, 8> ImpliedFeatures;
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llvm::X86::getImpliedFeatures(Name, Enabled, ImpliedFeatures);
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for (const auto &F : ImpliedFeatures)
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Features[F] = Enabled;
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}
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/// handleTargetFeatures - Perform initialization based on the user
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@ -262,15 +262,6 @@ public:
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void getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const override;
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static void setSSELevel(llvm::StringMap<bool> &Features, X86SSEEnum Level,
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bool Enabled);
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static void setMMXLevel(llvm::StringMap<bool> &Features, MMX3DNowEnum Level,
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bool Enabled);
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static void setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum Level,
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bool Enabled);
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void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
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bool Enabled) const override {
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setFeatureEnabledImpl(Features, Name, Enabled);
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@ -174,13 +174,16 @@ X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect")
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X86_FEATURE (3DNOW, "3dnow")
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X86_FEATURE (3DNOWA, "3dnowa")
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X86_FEATURE (ADX, "adx")
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X86_FEATURE (AMX_BF16, "amx-bf16")
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X86_FEATURE (AMX_INT8, "amx-int8")
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X86_FEATURE (AMX_TILE, "amx-tile")
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X86_FEATURE (CLDEMOTE, "cldemote")
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X86_FEATURE (CLFLUSHOPT, "clflushopt")
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X86_FEATURE (CLWB, "clwb")
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X86_FEATURE (CLZERO, "clzero")
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X86_FEATURE (CMPXCHG16B, "cx16")
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X86_FEATURE (CMPXCHG8B, "cx8")
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X86_FEATURE (EM64T, nullptr)
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X86_FEATURE (EM64T, "")
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X86_FEATURE (ENQCMD, "enqcmd")
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X86_FEATURE (F16C, "f16c")
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X86_FEATURE (FSGSBASE, "fsgsbase")
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@ -209,6 +212,7 @@ X86_FEATURE (SHSTK, "shstk")
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X86_FEATURE (TBM, "tbm")
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X86_FEATURE (TSXLDTRK, "tsxldtrk")
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X86_FEATURE (VAES, "vaes")
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X86_FEATURE (VZEROUPPER, "vzeroupper")
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X86_FEATURE (WAITPKG, "waitpkg")
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X86_FEATURE (WBNOINVD, "wbnoinvd")
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X86_FEATURE (X87, "x87")
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@ -216,5 +220,10 @@ X86_FEATURE (XSAVE, "xsave")
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X86_FEATURE (XSAVEC, "xsavec")
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X86_FEATURE (XSAVEOPT, "xsaveopt")
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X86_FEATURE (XSAVES, "xsaves")
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// These features aren't really CPU features, but the frontend can set them.
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X86_FEATURE (RETPOLINE_INDIRECT_BRANCHES, "retpoline-indirect-branches")
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X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls")
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X86_FEATURE (LVI_CFI, "lvi-cfi")
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X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening")
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#undef X86_FEATURE_COMPAT
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#undef X86_FEATURE
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@ -137,6 +137,11 @@ ProcessorFeatures getKeyFeature(CPUKind Kind);
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/// Fill in the features that \p CPU supports into \p Features.
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void getFeaturesForCPU(StringRef CPU, SmallVectorImpl<StringRef> &Features);
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/// Fill \p Features with the features that are implied to be enabled/disabled
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/// by the provided \p Feature.
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void getImpliedFeatures(StringRef Feature, bool Enabled,
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SmallVectorImpl<StringRef> &Features);
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} // namespace X86
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} // namespace llvm
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@ -48,6 +48,14 @@ public:
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return (Bits[I / 32] & Mask) != 0;
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}
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constexpr FeatureBitset &operator|=(const FeatureBitset &RHS) {
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for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
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uint32_t NewBits = Bits[I] | RHS.Bits[I];
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Bits[I] = NewBits;
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}
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return *this;
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}
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constexpr FeatureBitset operator&(const FeatureBitset &RHS) const {
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FeatureBitset Result;
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for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I)
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@ -77,6 +85,11 @@ struct ProcInfo {
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FeatureBitset Features;
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};
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struct FeatureInfo {
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StringLiteral Name;
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FeatureBitset ImpliedFeatures;
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};
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} // end anonymous namespace
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#define X86_FEATURE(ENUM, STRING) \
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@ -376,19 +389,187 @@ ProcessorFeatures llvm::X86::getKeyFeature(X86::CPUKind Kind) {
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llvm_unreachable("Unable to find CPU kind!");
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}
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static const char *FeatureStrings[X86::CPU_FEATURE_MAX] = {
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#define X86_FEATURE(ENUM, STR) STR,
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// Features with no dependencies.
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static constexpr FeatureBitset ImpliedFeaturesADX = {};
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static constexpr FeatureBitset ImpliedFeaturesBMI = {};
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static constexpr FeatureBitset ImpliedFeaturesBMI2 = {};
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static constexpr FeatureBitset ImpliedFeaturesCLDEMOTE = {};
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static constexpr FeatureBitset ImpliedFeaturesCLFLUSHOPT = {};
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static constexpr FeatureBitset ImpliedFeaturesCLWB = {};
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static constexpr FeatureBitset ImpliedFeaturesCLZERO = {};
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static constexpr FeatureBitset ImpliedFeaturesCMOV = {};
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static constexpr FeatureBitset ImpliedFeaturesCMPXCHG16B = {};
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static constexpr FeatureBitset ImpliedFeaturesCMPXCHG8B = {};
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static constexpr FeatureBitset ImpliedFeaturesEM64T = {};
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static constexpr FeatureBitset ImpliedFeaturesENQCMD = {};
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static constexpr FeatureBitset ImpliedFeaturesFSGSBASE = {};
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static constexpr FeatureBitset ImpliedFeaturesFXSR = {};
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static constexpr FeatureBitset ImpliedFeaturesINVPCID = {};
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static constexpr FeatureBitset ImpliedFeaturesLWP = {};
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static constexpr FeatureBitset ImpliedFeaturesLZCNT = {};
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static constexpr FeatureBitset ImpliedFeaturesMWAITX = {};
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static constexpr FeatureBitset ImpliedFeaturesMOVBE = {};
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static constexpr FeatureBitset ImpliedFeaturesMOVDIR64B = {};
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static constexpr FeatureBitset ImpliedFeaturesMOVDIRI = {};
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static constexpr FeatureBitset ImpliedFeaturesPCONFIG = {};
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static constexpr FeatureBitset ImpliedFeaturesPOPCNT = {};
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static constexpr FeatureBitset ImpliedFeaturesPKU = {};
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static constexpr FeatureBitset ImpliedFeaturesPREFETCHWT1 = {};
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static constexpr FeatureBitset ImpliedFeaturesPRFCHW = {};
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static constexpr FeatureBitset ImpliedFeaturesPTWRITE = {};
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static constexpr FeatureBitset ImpliedFeaturesRDPID = {};
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static constexpr FeatureBitset ImpliedFeaturesRDRND = {};
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static constexpr FeatureBitset ImpliedFeaturesRDSEED = {};
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static constexpr FeatureBitset ImpliedFeaturesRTM = {};
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static constexpr FeatureBitset ImpliedFeaturesSAHF = {};
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static constexpr FeatureBitset ImpliedFeaturesSERIALIZE = {};
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static constexpr FeatureBitset ImpliedFeaturesSGX = {};
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static constexpr FeatureBitset ImpliedFeaturesSHSTK = {};
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static constexpr FeatureBitset ImpliedFeaturesTBM = {};
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static constexpr FeatureBitset ImpliedFeaturesTSXLDTRK = {};
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static constexpr FeatureBitset ImpliedFeaturesWAITPKG = {};
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static constexpr FeatureBitset ImpliedFeaturesWBNOINVD = {};
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static constexpr FeatureBitset ImpliedFeaturesVZEROUPPER = {};
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static constexpr FeatureBitset ImpliedFeaturesX87 = {};
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static constexpr FeatureBitset ImpliedFeaturesXSAVE = {};
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// Not really CPU features, but need to be in the table because clang uses
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// target features to communicate them to the backend.
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static constexpr FeatureBitset ImpliedFeaturesRETPOLINE_INDIRECT_BRANCHES = {};
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static constexpr FeatureBitset ImpliedFeaturesRETPOLINE_INDIRECT_CALLS = {};
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static constexpr FeatureBitset ImpliedFeaturesLVI_CFI = {};
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static constexpr FeatureBitset ImpliedFeaturesLVI_LOAD_HARDENING = {};
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// XSAVE features are dependent on basic XSAVE.
|
||||
static constexpr FeatureBitset ImpliedFeaturesXSAVEC = FeatureXSAVE;
|
||||
static constexpr FeatureBitset ImpliedFeaturesXSAVEOPT = FeatureXSAVE;
|
||||
static constexpr FeatureBitset ImpliedFeaturesXSAVES = FeatureXSAVE;
|
||||
|
||||
// MMX->3DNOW->3DNOWA chain.
|
||||
static constexpr FeatureBitset ImpliedFeaturesMMX = {};
|
||||
static constexpr FeatureBitset ImpliedFeatures3DNOW = FeatureMMX;
|
||||
static constexpr FeatureBitset ImpliedFeatures3DNOWA = Feature3DNOW;
|
||||
|
||||
// SSE/AVX/AVX512F chain.
|
||||
static constexpr FeatureBitset ImpliedFeaturesSSE = {};
|
||||
static constexpr FeatureBitset ImpliedFeaturesSSE2 = FeatureSSE;
|
||||
static constexpr FeatureBitset ImpliedFeaturesSSE3 = FeatureSSE2;
|
||||
static constexpr FeatureBitset ImpliedFeaturesSSSE3 = FeatureSSE3;
|
||||
static constexpr FeatureBitset ImpliedFeaturesSSE4_1 = FeatureSSSE3;
|
||||
static constexpr FeatureBitset ImpliedFeaturesSSE4_2 = FeatureSSE4_1;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX = FeatureSSE4_2;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX2 = FeatureAVX;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512F =
|
||||
FeatureAVX2 | FeatureF16C | FeatureFMA;
|
||||
|
||||
// Vector extensions that build on SSE or AVX.
|
||||
static constexpr FeatureBitset ImpliedFeaturesAES = FeatureSSE2;
|
||||
static constexpr FeatureBitset ImpliedFeaturesF16C = FeatureAVX;
|
||||
static constexpr FeatureBitset ImpliedFeaturesFMA = FeatureAVX;
|
||||
static constexpr FeatureBitset ImpliedFeaturesGFNI = FeatureSSE2;
|
||||
static constexpr FeatureBitset ImpliedFeaturesPCLMUL = FeatureSSE2;
|
||||
static constexpr FeatureBitset ImpliedFeaturesSHA = FeatureSSE2;
|
||||
static constexpr FeatureBitset ImpliedFeaturesVAES = FeatureAES | FeatureAVX;
|
||||
static constexpr FeatureBitset ImpliedFeaturesVPCLMULQDQ =
|
||||
FeatureAVX | FeaturePCLMUL;
|
||||
|
||||
// AVX512 features.
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512CD = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512BW = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512DQ = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512ER = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512PF = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512VL = FeatureAVX512F;
|
||||
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512BF16 = FeatureAVX512BW;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512BITALG = FeatureAVX512BW;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512IFMA = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512VNNI = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512VPOPCNTDQ = FeatureAVX512F;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512VBMI = FeatureAVX512BW;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512VBMI2 = FeatureAVX512BW;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX512VP2INTERSECT =
|
||||
FeatureAVX512F;
|
||||
|
||||
// FIXME: These two aren't really implemented and just exist in the feature
|
||||
// list for __builtin_cpu_supports. So omit their dependencies.
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX5124FMAPS = {};
|
||||
static constexpr FeatureBitset ImpliedFeaturesAVX5124VNNIW = {};
|
||||
|
||||
// SSE4_A->FMA4->XOP chain.
|
||||
static constexpr FeatureBitset ImpliedFeaturesSSE4_A = FeatureSSSE3;
|
||||
static constexpr FeatureBitset ImpliedFeaturesFMA4 = FeatureAVX | FeatureSSE4_A;
|
||||
static constexpr FeatureBitset ImpliedFeaturesXOP = FeatureFMA4;
|
||||
|
||||
// AMX Features
|
||||
static constexpr FeatureBitset ImpliedFeaturesAMX_TILE = {};
|
||||
static constexpr FeatureBitset ImpliedFeaturesAMX_BF16 = FeatureAMX_TILE;
|
||||
static constexpr FeatureBitset ImpliedFeaturesAMX_INT8 = FeatureAMX_TILE;
|
||||
|
||||
static constexpr FeatureInfo FeatureInfos[X86::CPU_FEATURE_MAX] = {
|
||||
#define X86_FEATURE(ENUM, STR) {{STR}, ImpliedFeatures##ENUM},
|
||||
#include "llvm/Support/X86TargetParser.def"
|
||||
};
|
||||
|
||||
// Convert the set bits in FeatureBitset to a list of strings.
|
||||
static void getFeatureBitsAsStrings(const FeatureBitset &Bits,
|
||||
SmallVectorImpl<StringRef> &Features) {
|
||||
for (unsigned i = 0; i != CPU_FEATURE_MAX; ++i)
|
||||
if (Bits[i] && !FeatureInfos[i].Name.empty())
|
||||
Features.push_back(FeatureInfos[i].Name);
|
||||
}
|
||||
|
||||
void llvm::X86::getFeaturesForCPU(StringRef CPU,
|
||||
SmallVectorImpl<StringRef> &Features) {
|
||||
SmallVectorImpl<StringRef> &EnabledFeatures) {
|
||||
auto I = llvm::find_if(Processors,
|
||||
[&](const ProcInfo &P) { return P.Name == CPU; });
|
||||
assert(I != std::end(Processors) && "Processor not found!");
|
||||
|
||||
// Add the string version of all set bits.
|
||||
for (unsigned i = 0; i != CPU_FEATURE_MAX; ++i)
|
||||
if (FeatureStrings[i] && I->Features[i])
|
||||
Features.push_back(FeatureStrings[i]);
|
||||
getFeatureBitsAsStrings(I->Features, EnabledFeatures);
|
||||
}
|
||||
|
||||
// For each feature that is (transitively) implied by this feature, set it.
|
||||
static void getImpliedEnabledFeatures(FeatureBitset &Bits,
|
||||
const FeatureBitset &Implies) {
|
||||
Bits |= Implies;
|
||||
for (unsigned i = 0; i != CPU_FEATURE_MAX; ++i) {
|
||||
if (Implies[i])
|
||||
getImpliedEnabledFeatures(Bits, FeatureInfos[i].ImpliedFeatures);
|
||||
}
|
||||
}
|
||||
|
||||
/// Create bit vector of features that are implied disabled if the feature
|
||||
/// passed in Value is disabled.
|
||||
static void getImpliedDisabledFeatures(FeatureBitset &Bits, unsigned Value) {
|
||||
// Check all features looking for any dependent on this feature. If we find
|
||||
// one, mark it and recursively find any feature that depend on it.
|
||||
for (unsigned i = 0; i != CPU_FEATURE_MAX; ++i) {
|
||||
if (FeatureInfos[i].ImpliedFeatures[Value]) {
|
||||
Bits.set(i);
|
||||
getImpliedDisabledFeatures(Bits, i);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void llvm::X86::getImpliedFeatures(
|
||||
StringRef Feature, bool Enabled,
|
||||
SmallVectorImpl<StringRef> &ImpliedFeatures) {
|
||||
auto I = llvm::find_if(
|
||||
FeatureInfos, [&](const FeatureInfo &FI) { return FI.Name == Feature; });
|
||||
if (I == std::end(FeatureInfos)) {
|
||||
// This shouldn't happen, but handle it gracefully for release builds.
|
||||
assert(false && "Feature not in table!");
|
||||
return;
|
||||
}
|
||||
|
||||
FeatureBitset ImpliedBits;
|
||||
if (Enabled)
|
||||
getImpliedEnabledFeatures(ImpliedBits, I->ImpliedFeatures);
|
||||
else
|
||||
getImpliedDisabledFeatures(ImpliedBits,
|
||||
std::distance(std::begin(FeatureInfos), I));
|
||||
|
||||
// Convert all the found bits into strings.
|
||||
getFeatureBitsAsStrings(ImpliedBits, ImpliedFeatures);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue