forked from OSchip/llvm-project
move all the opcodes out of DAGISelHeader.h (which gets
#included into the middle of each isel class) into a real header. llvm-svn: 97421
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@ -263,61 +263,6 @@ void UpdateChainsAndFlags(SDNode *NodeToMatch, SDValue InputChain,
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}
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}
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enum BuiltinOpcodes {
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OPC_Scope,
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OPC_RecordNode,
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OPC_RecordChild0, OPC_RecordChild1, OPC_RecordChild2, OPC_RecordChild3,
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OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7,
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OPC_RecordMemRef,
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OPC_CaptureFlagInput,
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OPC_MoveChild,
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OPC_MoveParent,
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OPC_CheckSame,
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OPC_CheckPatternPredicate,
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OPC_CheckPredicate,
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OPC_CheckOpcode,
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OPC_CheckMultiOpcode,
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OPC_CheckType,
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OPC_CheckChild0Type, OPC_CheckChild1Type, OPC_CheckChild2Type,
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OPC_CheckChild3Type, OPC_CheckChild4Type, OPC_CheckChild5Type,
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OPC_CheckChild6Type, OPC_CheckChild7Type,
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OPC_CheckInteger1, OPC_CheckInteger2, OPC_CheckInteger4, OPC_CheckInteger8,
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OPC_CheckCondCode,
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OPC_CheckValueType,
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OPC_CheckComplexPat,
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OPC_CheckAndImm1, OPC_CheckAndImm2, OPC_CheckAndImm4, OPC_CheckAndImm8,
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OPC_CheckOrImm1, OPC_CheckOrImm2, OPC_CheckOrImm4, OPC_CheckOrImm8,
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OPC_CheckFoldableChainNode,
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OPC_CheckChainCompatible,
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OPC_EmitInteger1, OPC_EmitInteger2, OPC_EmitInteger4, OPC_EmitInteger8,
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OPC_EmitRegister,
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OPC_EmitConvertToTarget,
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OPC_EmitMergeInputChains,
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OPC_EmitCopyToReg,
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OPC_EmitNodeXForm,
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OPC_EmitNode,
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OPC_MorphNodeTo,
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OPC_MarkFlagResults,
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OPC_CompleteMatch
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};
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enum {
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OPFL_None = 0, // Node has no chain or flag input and isn't variadic.
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OPFL_Chain = 1, // Node has a chain input.
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OPFL_FlagInput = 2, // Node has a flag input.
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OPFL_FlagOutput = 4, // Node has a flag output.
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OPFL_MemRefs = 8, // Node gets accumulated MemRefs.
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OPFL_Variadic0 = 1<<4, // Node is variadic, root has 0 fixed inputs.
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OPFL_Variadic1 = 2<<4, // Node is variadic, root has 1 fixed inputs.
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OPFL_Variadic2 = 3<<4, // Node is variadic, root has 2 fixed inputs.
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OPFL_Variadic3 = 4<<4, // Node is variadic, root has 3 fixed inputs.
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OPFL_Variadic4 = 5<<4, // Node is variadic, root has 4 fixed inputs.
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OPFL_Variadic5 = 6<<4, // Node is variadic, root has 5 fixed inputs.
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OPFL_Variadic6 = 7<<4, // Node is variadic, root has 6 fixed inputs.
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OPFL_VariadicInfo = OPFL_Variadic6
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};
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/// getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the
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/// getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the
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/// number of fixed arity values that should be skipped when copying from the
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/// number of fixed arity values that should be skipped when copying from the
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@ -97,6 +97,64 @@ public:
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/// to use for this target when scheduling the DAG.
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/// to use for this target when scheduling the DAG.
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virtual ScheduleHazardRecognizer *CreateTargetHazardRecognizer();
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virtual ScheduleHazardRecognizer *CreateTargetHazardRecognizer();
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// Opcodes used by the DAG state machine:
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enum BuiltinOpcodes {
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OPC_Scope,
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OPC_RecordNode,
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OPC_RecordChild0, OPC_RecordChild1, OPC_RecordChild2, OPC_RecordChild3,
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OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7,
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OPC_RecordMemRef,
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OPC_CaptureFlagInput,
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OPC_MoveChild,
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OPC_MoveParent,
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OPC_CheckSame,
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OPC_CheckPatternPredicate,
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OPC_CheckPredicate,
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OPC_CheckOpcode,
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OPC_CheckMultiOpcode,
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OPC_CheckType,
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OPC_CheckChild0Type, OPC_CheckChild1Type, OPC_CheckChild2Type,
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OPC_CheckChild3Type, OPC_CheckChild4Type, OPC_CheckChild5Type,
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OPC_CheckChild6Type, OPC_CheckChild7Type,
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OPC_CheckInteger1, OPC_CheckInteger2, OPC_CheckInteger4, OPC_CheckInteger8,
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OPC_CheckCondCode,
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OPC_CheckValueType,
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OPC_CheckComplexPat,
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OPC_CheckAndImm1, OPC_CheckAndImm2, OPC_CheckAndImm4, OPC_CheckAndImm8,
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OPC_CheckOrImm1, OPC_CheckOrImm2, OPC_CheckOrImm4, OPC_CheckOrImm8,
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OPC_CheckFoldableChainNode,
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OPC_CheckChainCompatible,
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OPC_EmitInteger1, OPC_EmitInteger2, OPC_EmitInteger4, OPC_EmitInteger8,
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OPC_EmitRegister,
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OPC_EmitConvertToTarget,
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OPC_EmitMergeInputChains,
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OPC_EmitCopyToReg,
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OPC_EmitNodeXForm,
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OPC_EmitNode,
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OPC_MorphNodeTo,
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OPC_MarkFlagResults,
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OPC_CompleteMatch
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};
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enum {
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OPFL_None = 0, // Node has no chain or flag input and isn't variadic.
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OPFL_Chain = 1, // Node has a chain input.
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OPFL_FlagInput = 2, // Node has a flag input.
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OPFL_FlagOutput = 4, // Node has a flag output.
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OPFL_MemRefs = 8, // Node gets accumulated MemRefs.
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OPFL_Variadic0 = 1<<4, // Node is variadic, root has 0 fixed inputs.
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OPFL_Variadic1 = 2<<4, // Node is variadic, root has 1 fixed inputs.
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OPFL_Variadic2 = 3<<4, // Node is variadic, root has 2 fixed inputs.
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OPFL_Variadic3 = 4<<4, // Node is variadic, root has 3 fixed inputs.
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OPFL_Variadic4 = 5<<4, // Node is variadic, root has 4 fixed inputs.
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OPFL_Variadic5 = 6<<4, // Node is variadic, root has 5 fixed inputs.
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OPFL_Variadic6 = 7<<4, // Node is variadic, root has 6 fixed inputs.
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OPFL_VariadicInfo = OPFL_Variadic6
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};
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protected:
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protected:
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/// DAGSize - Size of DAG being instruction selected.
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/// DAGSize - Size of DAG being instruction selected.
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///
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///
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