forked from OSchip/llvm-project
parent
fa03b0fafa
commit
16da6c466f
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@ -1,16 +1,21 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -instcombine %s | FileCheck %s
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define <1 x i8> @test1(<8 x i8> %in) {
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; CHECK-LABEL: @test1
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; CHECK: shufflevector <8 x i8> %in, <8 x i8> undef, <1 x i32> <i32 5>
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[VEC:%.*]] = shufflevector <8 x i8> %in, <8 x i8> undef, <1 x i32> <i32 5>
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; CHECK-NEXT: ret <1 x i8> [[VEC]]
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;
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%val = extractelement <8 x i8> %in, i32 5
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%vec = insertelement <1 x i8> undef, i8 %val, i32 0
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ret <1 x i8> %vec
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}
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define <4 x i16> @test2(<8 x i16> %in, <8 x i16> %in2) {
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; CHECK-LABEL: @test2
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; CHECK: shufflevector <8 x i16> %in2, <8 x i16> %in, <4 x i32> <i32 11, i32 9, i32 0, i32 10>
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[VEC_3:%.*]] = shufflevector <8 x i16> %in2, <8 x i16> %in, <4 x i32> <i32 11, i32 9, i32 0, i32 10>
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; CHECK-NEXT: ret <4 x i16> [[VEC_3]]
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;
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%elt0 = extractelement <8 x i16> %in, i32 3
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%elt1 = extractelement <8 x i16> %in, i32 1
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%elt2 = extractelement <8 x i16> %in2, i32 0
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@ -25,10 +30,11 @@ define <4 x i16> @test2(<8 x i16> %in, <8 x i16> %in2) {
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}
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define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
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; CHECK-LABEL: @test_vcopyq_lane_p64
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <1 x i64> %b, <1 x i64> undef, <2 x i32> <i32 0, i32 undef>
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; CHECK-NEXT: shufflevector <2 x i64> %a, <2 x i64> %[[WIDEVEC]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: ret <2 x i64> %res
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; CHECK-LABEL: @test_vcopyq_lane_p64(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i64> %b, <1 x i64> undef, <2 x i32> <i32 0, i32 undef>
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; CHECK-NEXT: [[RES:%.*]] = shufflevector <2 x i64> %a, <2 x i64> [[TMP1]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: ret <2 x i64> [[RES]]
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;
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%elt = extractelement <1 x i64> %b, i32 0
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%res = insertelement <2 x i64> %a, i64 %elt, i32 1
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ret <2 x i64> %res
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@ -38,9 +44,10 @@ define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
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define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
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; CHECK-LABEL: @widen_extract2(
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <2 x float> %ext, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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; CHECK-NEXT: shufflevector <4 x float> %ins, <4 x float> %[[WIDEVEC]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
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; CHECK-NEXT: ret <4 x float> %i2
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> %ext, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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; CHECK-NEXT: [[I2:%.*]] = shufflevector <4 x float> %ins, <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
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; CHECK-NEXT: ret <4 x float> [[I2]]
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;
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%e1 = extractelement <2 x float> %ext, i32 0
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%e2 = extractelement <2 x float> %ext, i32 1
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%i1 = insertelement <4 x float> %ins, float %e1, i32 1
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@ -50,9 +57,10 @@ define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
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define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
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; CHECK-LABEL: @widen_extract3(
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <3 x float> %ext, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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; CHECK-NEXT: shufflevector <4 x float> %ins, <4 x float> %[[WIDEVEC]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x float> %i3
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> %ext, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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; CHECK-NEXT: [[I3:%.*]] = shufflevector <4 x float> %ins, <4 x float> [[TMP1]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x float> [[I3]]
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;
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%e1 = extractelement <3 x float> %ext, i32 0
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%e2 = extractelement <3 x float> %ext, i32 1
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%e3 = extractelement <3 x float> %ext, i32 2
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@ -64,9 +72,10 @@ define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
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define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
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; CHECK-LABEL: @widen_extract4(
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <2 x float> %ext, <2 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: shufflevector <8 x float> %ins, <8 x float> %[[WIDEVEC]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret <8 x float> %i1
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> %ext, <2 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[I1:%.*]] = shufflevector <8 x float> %ins, <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret <8 x float> [[I1]]
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;
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%e1 = extractelement <2 x float> %ext, i32 0
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%i1 = insertelement <8 x float> %ins, float %e1, i32 2
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ret <8 x float> %i1
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@ -77,12 +86,13 @@ define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
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define <8 x i16> @pr26015(<4 x i16> %t0) {
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; CHECK-LABEL: @pr26015(
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <4 x i16> %t0, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: %[[EXT:.*]] = extractelement <4 x i16> %t0, i32 2
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; CHECK-NEXT: %t2 = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 undef, i16 0, i16 0, i16 undef, i16 undef>, i16 %[[EXT]], i32 3
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; CHECK-NEXT: %t3 = insertelement <8 x i16> %t2, i16 0, i32 6
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; CHECK-NEXT: %t5 = shufflevector <8 x i16> %t3, <8 x i16> %[[WIDEVEC]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
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; CHECK-NEXT: ret <8 x i16> %t5
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> %t0, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i16> %t0, i32 2
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; CHECK-NEXT: [[T2:%.*]] = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 undef, i16 0, i16 0, i16 undef, i16 undef>, i16 [[TMP2]], i32 3
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; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> [[T2]], i16 0, i32 6
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; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
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; CHECK-NEXT: ret <8 x i16> [[T5]]
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;
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%t1 = extractelement <4 x i16> %t0, i32 2
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%t2 = insertelement <8 x i16> zeroinitializer, i16 %t1, i32 3
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%t3 = insertelement <8 x i16> %t2, i16 0, i32 6
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@ -96,18 +106,19 @@ define <8 x i16> @pr26015(<4 x i16> %t0) {
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define <8 x i16> @pr25999(<4 x i16> %t0, i1 %b) {
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; CHECK-LABEL: @pr25999(
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; CHECK-NEXT: %t1 = extractelement <4 x i16> %t0, i32 2
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; CHECK-NEXT: br i1 %b, label %if, label %end
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; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> %t0, i32 2
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; CHECK-NEXT: br i1 %b, label %if, label %end
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; CHECK: if:
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <4 x i16> %t0, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: %t2 = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 undef, i16 0, i16 0, i16 undef, i16 undef>, i16 %t1, i32 3
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; CHECK-NEXT: %t3 = insertelement <8 x i16> %t2, i16 0, i32 6
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; CHECK-NEXT: %t5 = shufflevector <8 x i16> %t3, <8 x i16> %[[WIDEVEC]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
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; CHECK-NEXT: ret <8 x i16> %t5
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> %t0, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[T2:%.*]] = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 undef, i16 0, i16 0, i16 undef, i16 undef>, i16 [[T1]], i32 3
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; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> [[T2]], i16 0, i32 6
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; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
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; CHECK-NEXT: ret <8 x i16> [[T5]]
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; CHECK: end:
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; CHECK-NEXT: %a1 = add i16 %t1, 4
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; CHECK-NEXT: %t6 = insertelement <8 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a1, i32 0
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; CHECK-NEXT: ret <8 x i16> %t6
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; CHECK-NEXT: [[A1:%.*]] = add i16 [[T1]], 4
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; CHECK-NEXT: [[T6:%.*]] = insertelement <8 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 [[A1]], i32 0
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; CHECK-NEXT: ret <8 x i16> [[T6]]
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;
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%t1 = extractelement <4 x i16> %t0, i32 2
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br i1 %b, label %if, label %end
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@ -125,15 +136,22 @@ end:
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ret <8 x i16> %t6
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}
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; The widening shuffle must be inserted at a valid point (after the PHIs).
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; The widening shuffle must be inserted at a valid point (after the PHIs).
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define <4 x double> @pr25999_phis1(i1 %c, <2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @pr25999_phis1(
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; CHECK: %tmp1 = phi <2 x double> [ %a, %bb1 ], [ %r, %bb2 ]
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; CHECK-NEXT: %tmp2 = phi <4 x double> [ %b, %bb1 ], [ zeroinitializer, %bb2 ]
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <2 x double> %tmp1, <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: %tmp4 = shufflevector <4 x double> %tmp2, <4 x double> %[[WIDEVEC]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x double> %tmp4
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; CHECK-NEXT: bb1:
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; CHECK-NEXT: br i1 %c, label %bb2, label %bb3
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; CHECK: bb2:
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; CHECK-NEXT: [[R:%.*]] = call <2 x double> @dummy(<2 x double> %a)
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; CHECK-NEXT: br label %bb3
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; CHECK: bb3:
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; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ %a, %bb1 ], [ [[R]], %bb2 ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ %b, %bb1 ], [ zeroinitializer, %bb2 ]
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; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x double> [[TMP4]]
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;
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bb1:
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br i1 %c, label %bb2, label %bb3
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@ -153,12 +171,19 @@ declare <2 x double> @dummy(<2 x double>)
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define <4 x double> @pr25999_phis2(i1 %c, <2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @pr25999_phis2(
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; CHECK: %tmp1 = phi <2 x double> [ %a, %bb1 ], [ %r, %bb2 ]
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; CHECK-NEXT: %tmp2 = phi <4 x double> [ %b, %bb1 ], [ zeroinitializer, %bb2 ]
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; CHECK-NEXT: %d = fadd <2 x double> %tmp1, %tmp1
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; CHECK-NEXT: %[[WIDEVEC:.*]] = shufflevector <2 x double> %d, <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: %tmp4 = shufflevector <4 x double> %tmp2, <4 x double> %[[WIDEVEC]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x double> %tmp4
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; CHECK-NEXT: bb1:
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; CHECK-NEXT: br i1 %c, label %bb2, label %bb3
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; CHECK: bb2:
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; CHECK-NEXT: [[R:%.*]] = call <2 x double> @dummy(<2 x double> %a)
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; CHECK-NEXT: br label %bb3
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; CHECK: bb3:
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; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ %a, %bb1 ], [ [[R]], %bb2 ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ %b, %bb1 ], [ zeroinitializer, %bb2 ]
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; CHECK-NEXT: [[D:%.*]] = fadd <2 x double> [[TMP1]], [[TMP1]]
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; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[D]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x double> [[TMP4]]
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;
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bb1:
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br i1 %c, label %bb2, label %bb3
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@ -180,13 +205,20 @@ bb3:
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define double @pr26354(<2 x double>* %tmp, i1 %B) {
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; CHECK-LABEL: @pr26354(
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; CHECK: %ld = load <2 x double>, <2 x double>* %tmp
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; CHECK-NEXT: %e1 = extractelement <2 x double> %ld, i32 0
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; CHECK-NEXT: br i1 %B, label %if, label %end
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LD:%.*]] = load <2 x double>, <2 x double>* %tmp, align 16
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; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x double> [[LD]], i32 0
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; CHECK-NEXT: br i1 %B, label %if, label %end
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; CHECK: if:
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; CHECK-NEXT: %e2 = extractelement <2 x double> %ld, i32 1
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; CHECK-NEXT: %i1 = insertelement <4 x double>
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; CHECK-NEXT: br label %end
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; CHECK-NEXT: [[E2:%.*]] = extractelement <2 x double> [[LD]], i32 1
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; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x double> <double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double undef>, double [[E2]], i32 3
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; CHECK-NEXT: br label %end
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; CHECK: end:
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; CHECK-NEXT: [[PH:%.*]] = phi <4 x double> [ undef, %entry ], [ [[I1]], %if ]
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; CHECK-NEXT: [[E3:%.*]] = extractelement <4 x double> [[PH]], i32 1
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; CHECK-NEXT: [[MU:%.*]] = fmul double [[E1]], [[E3]]
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; CHECK-NEXT: ret double [[MU]]
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;
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entry:
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%ld = load <2 x double>, <2 x double>* %tmp
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Reference in New Issue