From 16a03613fa32f53a7024c900c6cff99170e6d183 Mon Sep 17 00:00:00 2001 From: Elena Demikhovsky Date: Tue, 18 Feb 2014 07:52:26 +0000 Subject: [PATCH] AVX-512: Fixed size of mask registers llvm-svn: 201546 --- llvm/lib/Target/X86/X86RegisterInfo.td | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td index 8d79e13b1db8..a88b2bb1f15a 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.td +++ b/llvm/lib/Target/X86/X86RegisterInfo.td @@ -463,11 +463,13 @@ def VR128X : RegisterClass<"X86", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], def VR256X : RegisterClass<"X86", [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64], 256, (sequence "YMM%u", 0, 31)>; -def VK1 : RegisterClass<"X86", [i1], 1, (sequence "K%u", 0, 7)>; -def VK8 : RegisterClass<"X86", [v8i1], 8, (sequence "K%u", 0, 7)>; +// The size of the all masked registers is 16 bit because we have only one +// KMOVW istruction that can store this register in memory, and it writes 2 bytes +def VK1 : RegisterClass<"X86", [i1], 16, (sequence "K%u", 0, 7)>; +def VK8 : RegisterClass<"X86", [v8i1], 16, (sequence "K%u", 0, 7)>; def VK16 : RegisterClass<"X86", [v16i1], 16, (add VK8)>; -def VK1WM : RegisterClass<"X86", [i1], 1, (sub VK1, K0)>; -def VK8WM : RegisterClass<"X86", [v8i1], 8, (sub VK8, K0)>; +def VK1WM : RegisterClass<"X86", [i1], 16, (sub VK1, K0)>; +def VK8WM : RegisterClass<"X86", [v8i1], 16, (sub VK8, K0)>; def VK16WM : RegisterClass<"X86", [v16i1], 16, (add VK8WM)>;