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[Hexagon] Fix initialization of HexagonSubtarget 

Make sure that "initializeSubtargetDependencies" sets all members that
InstrInfo and the like may depend on.

llvm-svn: 314214
This commit is contained in:
Krzysztof Parzyszek 2017-09-26 15:06:37 +00:00
parent ef41f6a573
commit 1665b3db40
2 changed files with 18 additions and 38 deletions
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54
llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
View File

@ -98,16 +98,20 @@ static cl::opt<bool> EnableCheckBankConflict("hexagon-check-bank-conflict",
cl::desc("Enable checking for cache bank conflicts"));
void HexagonSubtarget::initializeEnvironment() {
UseMemOps = false;
ModeIEEERndNear = false;
UseBSBScheduling = false;
HexagonSubtarget::HexagonSubtarget(const Triple &TT, StringRef CPU,
StringRef FS, const TargetMachine &TM)
: HexagonGenSubtargetInfo(TT, CPU, FS),
CPUString(Hexagon_MC::selectHexagonCPU(TT, CPU)),
InstrInfo(initializeSubtargetDependencies(CPU, FS)),
RegInfo(getHwMode()), TLInfo(TM, *this),
InstrItins(getInstrItineraryForCPU(CPUString)) {
// Beware of the default constructor of InstrItineraryData: it will
// reset all members to 0.
assert(InstrItins.Itineraries != nullptr && "InstrItins not initialized");
}
HexagonSubtarget &
HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
CPUString = Hexagon_MC::selectHexagonCPU(getTargetTriple(), CPU);
static std::map<StringRef, HexagonArchEnum> CpuTable {
{ "hexagonv4", V4 },
{ "hexagonv5", V5 },
@ -116,15 +120,20 @@ HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
{ "hexagonv62", V62 },
};
auto foundIt = CpuTable.find(CPUString);
if (foundIt != CpuTable.end())
HexagonArchVersion = foundIt->second;
auto FoundIt = CpuTable.find(CPUString);
if (FoundIt != CpuTable.end())
HexagonArchVersion = FoundIt->second;
else
llvm_unreachable("Unrecognized Hexagon processor version");
UseHVXOps = false;
UseHVXDblOps = false;
UseLongCalls = false;
UseMemOps = DisableMemOps ? false : EnableMemOps;
ModeIEEERndNear = EnableIEEERndNear;
UseBSBScheduling = hasV60TOps() && EnableBSBSched;
ParseSubtargetFeatures(CPUString, FS);
if (EnableHexagonHVX.getPosition())
@ -297,33 +306,6 @@ void HexagonSubtarget::BankConflictMutation::apply(ScheduleDAGInstrs *DAG) {
}
}
HexagonSubtarget::HexagonSubtarget(const Triple &TT, StringRef CPU,
StringRef FS, const TargetMachine &TM)
: HexagonGenSubtargetInfo(TT, CPU, FS), CPUString(CPU),
InstrInfo(initializeSubtargetDependencies(CPU, FS)),
RegInfo(getHwMode()), TLInfo(TM, *this) {
initializeEnvironment();
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUString);
// UseMemOps on by default unless disabled explicitly
if (DisableMemOps)
UseMemOps = false;
else if (EnableMemOps)
UseMemOps = true;
else
UseMemOps = false;
if (EnableIEEERndNear)
ModeIEEERndNear = true;
else
ModeIEEERndNear = false;
UseBSBScheduling = hasV60TOps() && EnableBSBSched;
}
/// \brief Perform target specific adjustments to the latency of a schedule
/// dependency.
void HexagonSubtarget::adjustSchedDependency(SUnit *Src, SUnit *Dst,

2
llvm/lib/Target/Hexagon/HexagonSubtarget.h
View File

@ -82,8 +82,6 @@ private:
HexagonFrameLowering FrameLowering;
InstrItineraryData InstrItins;
void initializeEnvironment();
public:
HexagonSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
const TargetMachine &TM);