forked from OSchip/llvm-project
[AMDGPU] Remove atomic pattern args in FLAT_[Global_]Atomic_Pseudo defs
We already have explicit patterns for these. Differential Revision: https://reviews.llvm.org/D124084
This commit is contained in:
Abinav Puthan Purayil
parent
f935908d7b
commit
165ae7276c
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@ -464,7 +464,6 @@ multiclass FLAT_Atomic_Pseudo<
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string opName,
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RegisterClass vdst_rc,
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ValueType vt,
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SDPatternOperator atomic = null_frag,
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ValueType data_vt = vt,
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RegisterClass data_rc = vdst_rc,
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bit isFP = isFloatType<data_vt>.ret,
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@ -483,11 +482,9 @@ multiclass FLAT_Atomic_Pseudo<
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def _RTN : FLAT_AtomicRet_Pseudo <opName,
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(outs getLdStRegisterOperand<vdst_rc>.ret:$vdst),
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(ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_GLC1:$cpol),
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" $vdst, $vaddr, $vdata$offset$cpol",
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[(set vt:$vdst,
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(atomic (FlatOffset i64:$vaddr, i16:$offset), data_vt:$vdata))]>,
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GlobalSaddrTable<0, opName#"_rtn">,
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AtomicNoRet <opName, 1>{
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" $vdst, $vaddr, $vdata$offset$cpol">,
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GlobalSaddrTable<0, opName#"_rtn">,
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AtomicNoRet <opName, 1> {
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let FPAtomic = isFP;
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let AddedComplexity = -1; // Prefer global atomics if available
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}
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@ -530,7 +527,6 @@ multiclass FLAT_Global_Atomic_Pseudo_RTN<
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string opName,
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RegisterClass vdst_rc,
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ValueType vt,
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SDPatternOperator atomic = null_frag,
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ValueType data_vt = vt,
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RegisterClass data_rc = vdst_rc,
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bit isFP = isFloatType<data_vt>.ret,
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@ -540,11 +536,9 @@ multiclass FLAT_Global_Atomic_Pseudo_RTN<
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def _RTN : FLAT_AtomicRet_Pseudo <opName,
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(outs vdst_op:$vdst),
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(ins VReg_64:$vaddr, data_op:$vdata, flat_offset:$offset, CPol_GLC1:$cpol),
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" $vdst, $vaddr, $vdata, off$offset$cpol",
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[(set vt:$vdst,
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(atomic (GlobalOffset i64:$vaddr, i16:$offset), data_vt:$vdata))]>,
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GlobalSaddrTable<0, opName#"_rtn">,
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AtomicNoRet <opName, 1> {
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" $vdst, $vaddr, $vdata, off$offset$cpol">,
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GlobalSaddrTable<0, opName#"_rtn">,
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AtomicNoRet <opName, 1> {
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let has_saddr = 1;
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let FPAtomic = isFP;
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}
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@ -566,12 +560,11 @@ multiclass FLAT_Global_Atomic_Pseudo<
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string opName,
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RegisterClass vdst_rc,
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ValueType vt,
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SDPatternOperator atomic_rtn = null_frag,
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ValueType data_vt = vt,
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RegisterClass data_rc = vdst_rc> {
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let is_flat_global = 1, SubtargetPredicate = HasFlatGlobalInsts in {
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defm "" : FLAT_Global_Atomic_Pseudo_NO_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
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defm "" : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_rc, vt, atomic_rtn, data_vt, data_rc>;
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defm "" : FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_rc, vt, data_vt, data_rc>;
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}
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}
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@ -608,93 +601,91 @@ def FLAT_STORE_SHORT_D16_HI : FLAT_Store_Pseudo <"flat_store_short_d16_hi", VGPR
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}
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defm FLAT_ATOMIC_CMPSWAP : FLAT_Atomic_Pseudo <"flat_atomic_cmpswap",
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VGPR_32, i32, AMDGPUatomic_cmp_swap_flat_32,
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v2i32, VReg_64>;
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VGPR_32, i32, v2i32, VReg_64>;
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defm FLAT_ATOMIC_CMPSWAP_X2 : FLAT_Atomic_Pseudo <"flat_atomic_cmpswap_x2",
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VReg_64, i64, AMDGPUatomic_cmp_swap_flat_64,
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v2i64, VReg_128>;
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VReg_64, i64, v2i64, VReg_128>;
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defm FLAT_ATOMIC_SWAP : FLAT_Atomic_Pseudo <"flat_atomic_swap",
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VGPR_32, i32, atomic_swap_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_SWAP_X2 : FLAT_Atomic_Pseudo <"flat_atomic_swap_x2",
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VReg_64, i64, atomic_swap_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_ADD : FLAT_Atomic_Pseudo <"flat_atomic_add",
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VGPR_32, i32, atomic_load_add_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_SUB : FLAT_Atomic_Pseudo <"flat_atomic_sub",
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VGPR_32, i32, atomic_load_sub_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_SMIN : FLAT_Atomic_Pseudo <"flat_atomic_smin",
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VGPR_32, i32, atomic_load_min_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_UMIN : FLAT_Atomic_Pseudo <"flat_atomic_umin",
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VGPR_32, i32, atomic_load_umin_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_SMAX : FLAT_Atomic_Pseudo <"flat_atomic_smax",
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VGPR_32, i32, atomic_load_max_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_UMAX : FLAT_Atomic_Pseudo <"flat_atomic_umax",
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VGPR_32, i32, atomic_load_umax_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_AND : FLAT_Atomic_Pseudo <"flat_atomic_and",
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VGPR_32, i32, atomic_load_and_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_OR : FLAT_Atomic_Pseudo <"flat_atomic_or",
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VGPR_32, i32, atomic_load_or_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_XOR : FLAT_Atomic_Pseudo <"flat_atomic_xor",
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VGPR_32, i32, atomic_load_xor_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_INC : FLAT_Atomic_Pseudo <"flat_atomic_inc",
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VGPR_32, i32, atomic_inc_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_DEC : FLAT_Atomic_Pseudo <"flat_atomic_dec",
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VGPR_32, i32, atomic_dec_flat_32>;
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VGPR_32, i32>;
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defm FLAT_ATOMIC_ADD_X2 : FLAT_Atomic_Pseudo <"flat_atomic_add_x2",
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VReg_64, i64, atomic_load_add_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_SUB_X2 : FLAT_Atomic_Pseudo <"flat_atomic_sub_x2",
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VReg_64, i64, atomic_load_sub_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_SMIN_X2 : FLAT_Atomic_Pseudo <"flat_atomic_smin_x2",
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VReg_64, i64, atomic_load_min_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_UMIN_X2 : FLAT_Atomic_Pseudo <"flat_atomic_umin_x2",
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VReg_64, i64, atomic_load_umin_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_SMAX_X2 : FLAT_Atomic_Pseudo <"flat_atomic_smax_x2",
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VReg_64, i64, atomic_load_max_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_UMAX_X2 : FLAT_Atomic_Pseudo <"flat_atomic_umax_x2",
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VReg_64, i64, atomic_load_umax_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_AND_X2 : FLAT_Atomic_Pseudo <"flat_atomic_and_x2",
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VReg_64, i64, atomic_load_and_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_OR_X2 : FLAT_Atomic_Pseudo <"flat_atomic_or_x2",
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VReg_64, i64, atomic_load_or_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_XOR_X2 : FLAT_Atomic_Pseudo <"flat_atomic_xor_x2",
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VReg_64, i64, atomic_load_xor_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_INC_X2 : FLAT_Atomic_Pseudo <"flat_atomic_inc_x2",
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VReg_64, i64, atomic_inc_flat_64>;
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VReg_64, i64>;
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defm FLAT_ATOMIC_DEC_X2 : FLAT_Atomic_Pseudo <"flat_atomic_dec_x2",
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VReg_64, i64, atomic_dec_flat_64>;
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VReg_64, i64>;
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// GFX7-, GFX10-only flat instructions.
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let SubtargetPredicate = isGFX7GFX10 in {
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defm FLAT_ATOMIC_FCMPSWAP : FLAT_Atomic_Pseudo <"flat_atomic_fcmpswap",
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VGPR_32, f32, null_frag, v2f32, VReg_64>;
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VGPR_32, f32, v2f32, VReg_64>;
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defm FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_Atomic_Pseudo <"flat_atomic_fcmpswap_x2",
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VReg_64, f64, null_frag, v2f64, VReg_128>;
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VReg_64, f64, v2f64, VReg_128>;
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defm FLAT_ATOMIC_FMIN : FLAT_Atomic_Pseudo <"flat_atomic_fmin",
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VGPR_32, f32>;
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@ -758,88 +749,86 @@ defm GLOBAL_STORE_SHORT_D16_HI : FLAT_Global_Store_Pseudo <"global_store_short_d
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let is_flat_global = 1 in {
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defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap",
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VGPR_32, i32, AMDGPUatomic_cmp_swap_global_32,
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v2i32, VReg_64>;
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VGPR_32, i32, v2i32, VReg_64>;
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defm GLOBAL_ATOMIC_CMPSWAP_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap_x2",
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VReg_64, i64, AMDGPUatomic_cmp_swap_global_64,
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v2i64, VReg_128>;
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VReg_64, i64, v2i64, VReg_128>;
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defm GLOBAL_ATOMIC_SWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_swap",
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VGPR_32, i32, atomic_swap_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_SWAP_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_swap_x2",
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VReg_64, i64, atomic_swap_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_ADD : FLAT_Global_Atomic_Pseudo <"global_atomic_add",
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VGPR_32, i32, atomic_load_add_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_SUB : FLAT_Global_Atomic_Pseudo <"global_atomic_sub",
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VGPR_32, i32, atomic_load_sub_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_SMIN : FLAT_Global_Atomic_Pseudo <"global_atomic_smin",
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VGPR_32, i32, atomic_load_min_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_UMIN : FLAT_Global_Atomic_Pseudo <"global_atomic_umin",
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VGPR_32, i32, atomic_load_umin_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_SMAX : FLAT_Global_Atomic_Pseudo <"global_atomic_smax",
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VGPR_32, i32, atomic_load_max_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_UMAX : FLAT_Global_Atomic_Pseudo <"global_atomic_umax",
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VGPR_32, i32, atomic_load_umax_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_AND : FLAT_Global_Atomic_Pseudo <"global_atomic_and",
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VGPR_32, i32, atomic_load_and_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_OR : FLAT_Global_Atomic_Pseudo <"global_atomic_or",
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VGPR_32, i32, atomic_load_or_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_XOR : FLAT_Global_Atomic_Pseudo <"global_atomic_xor",
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VGPR_32, i32, atomic_load_xor_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_INC : FLAT_Global_Atomic_Pseudo <"global_atomic_inc",
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VGPR_32, i32, atomic_inc_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_DEC : FLAT_Global_Atomic_Pseudo <"global_atomic_dec",
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VGPR_32, i32, atomic_dec_global_32>;
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VGPR_32, i32>;
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defm GLOBAL_ATOMIC_ADD_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_add_x2",
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VReg_64, i64, atomic_load_add_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_SUB_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_sub_x2",
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VReg_64, i64, atomic_load_sub_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_SMIN_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_smin_x2",
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VReg_64, i64, atomic_load_min_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_UMIN_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_umin_x2",
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VReg_64, i64, atomic_load_umin_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_SMAX_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_smax_x2",
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VReg_64, i64, atomic_load_max_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_UMAX_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_umax_x2",
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VReg_64, i64, atomic_load_umax_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_AND_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_and_x2",
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VReg_64, i64, atomic_load_and_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_OR_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_or_x2",
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VReg_64, i64, atomic_load_or_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_XOR_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_xor_x2",
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VReg_64, i64, atomic_load_xor_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_INC_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_inc_x2",
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VReg_64, i64, atomic_inc_global_64>;
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VReg_64, i64>;
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defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_dec_x2",
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VReg_64, i64, atomic_dec_global_64>;
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VReg_64, i64>;
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let SubtargetPredicate = HasGFX10_BEncoding in
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defm GLOBAL_ATOMIC_CSUB : FLAT_Global_Atomic_Pseudo_RTN <"global_atomic_csub",
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VGPR_32, i32, int_amdgcn_global_atomic_csub>;
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VGPR_32, i32>;
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let SubtargetPredicate = isGFX940Plus in {
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@ -895,13 +884,13 @@ defm SCRATCH_LOAD_LDS_DWORD : FLAT_Scratch_Load_LDS_Pseudo <"scratch_load_lds_d
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let SubtargetPredicate = isGFX10Plus, is_flat_global = 1 in {
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defm GLOBAL_ATOMIC_FCMPSWAP :
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FLAT_Global_Atomic_Pseudo<"global_atomic_fcmpswap", VGPR_32, f32, null_frag, v2f32, VReg_64>;
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FLAT_Global_Atomic_Pseudo<"global_atomic_fcmpswap", VGPR_32, f32, v2f32, VReg_64>;
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defm GLOBAL_ATOMIC_FMIN :
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FLAT_Global_Atomic_Pseudo<"global_atomic_fmin", VGPR_32, f32>;
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defm GLOBAL_ATOMIC_FMAX :
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FLAT_Global_Atomic_Pseudo<"global_atomic_fmax", VGPR_32, f32>;
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defm GLOBAL_ATOMIC_FCMPSWAP_X2 :
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FLAT_Global_Atomic_Pseudo<"global_atomic_fcmpswap_x2", VReg_64, f64, null_frag, v2f64, VReg_128>;
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FLAT_Global_Atomic_Pseudo<"global_atomic_fcmpswap_x2", VReg_64, f64, v2f64, VReg_128>;
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defm GLOBAL_ATOMIC_FMIN_X2 :
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FLAT_Global_Atomic_Pseudo<"global_atomic_fmin_x2", VReg_64, f64>;
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defm GLOBAL_ATOMIC_FMAX_X2 :
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