forked from OSchip/llvm-project
[llvm-mca] Removed references to HWStallEvent in Scheduler.h. NFCI
class Scheduler should not know anything of hardware event listeners and hardware stall events (HWStallEvent). HWStallEvent objects should only be constructed by pipeline stages to notify listeners of hardware events. No functional change intended. llvm-svn: 340036
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@ -16,7 +16,6 @@
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//===----------------------------------------------------------------------===//
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#include "ExecuteStage.h"
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#include "Scheduler.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Support/Debug.h"
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@ -26,11 +25,29 @@ namespace mca {
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using namespace llvm;
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HWStallEvent::GenericEventType toHWStallEventType(Scheduler::StallKind Event) {
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switch (Event) {
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case Scheduler::LoadQueueFull:
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return HWStallEvent::LoadQueueFull;
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case Scheduler::StoreQueueFull:
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return HWStallEvent::StoreQueueFull;
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case Scheduler::SchedulerQueueFull:
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return HWStallEvent::SchedulerQueueFull;
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case Scheduler::DispatchGroupStall:
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return HWStallEvent::DispatchGroupStall;
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case Scheduler::NoStall:
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return HWStallEvent::Invalid;
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}
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llvm_unreachable("Don't know how to process this StallKind!");
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}
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bool ExecuteStage::isAvailable(const InstRef &IR) const {
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HWStallEvent::GenericEventType Event;
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Scheduler::StallKind Event = Scheduler::NoStall;
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if (HWS.canBeDispatched(IR, Event))
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return true;
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notifyEvent<HWStallEvent>(HWStallEvent(Event, IR));
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HWStallEvent::GenericEventType ET = toHWStallEventType(Event);
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notifyEvent<HWStallEvent>(HWStallEvent(ET, IR));
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return false;
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}
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@ -258,27 +258,28 @@ void Scheduler::dump() const {
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#endif
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bool Scheduler::canBeDispatched(const InstRef &IR,
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HWStallEvent::GenericEventType &Event) const {
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Event = HWStallEvent::Invalid;
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Scheduler::StallKind &Event) const {
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Event = StallKind::NoStall;
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const InstrDesc &Desc = IR.getInstruction()->getDesc();
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// Give lower priority to these stall events.
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if (Desc.MayStore && LSU->isSQFull())
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Event = StallKind::StoreQueueFull;
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if (Desc.MayLoad && LSU->isLQFull())
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Event = HWStallEvent::LoadQueueFull;
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else if (Desc.MayStore && LSU->isSQFull())
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Event = HWStallEvent::StoreQueueFull;
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else {
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switch (Resources->canBeDispatched(Desc.Buffers)) {
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default:
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return true;
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case ResourceStateEvent::RS_BUFFER_UNAVAILABLE:
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Event = HWStallEvent::SchedulerQueueFull;
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break;
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case ResourceStateEvent::RS_RESERVED:
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Event = HWStallEvent::DispatchGroupStall;
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}
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Event = StallKind::LoadQueueFull;
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switch (Resources->canBeDispatched(Desc.Buffers)) {
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case ResourceStateEvent::RS_BUFFER_UNAVAILABLE:
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Event = StallKind::SchedulerQueueFull;
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break;
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case ResourceStateEvent::RS_RESERVED:
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Event = StallKind::DispatchGroupStall;
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break;
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default:
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break;
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}
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return false;
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return Event == StallKind::NoStall;
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}
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void Scheduler::issueInstructionImpl(
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@ -15,11 +15,9 @@
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#ifndef LLVM_TOOLS_LLVM_MCA_SCHEDULER_H
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#define LLVM_TOOLS_LLVM_MCA_SCHEDULER_H
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#include "HWEventListener.h"
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#include "HardwareUnit.h"
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#include "Instruction.h"
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#include "LSUnit.h"
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#include "RetireControlUnit.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallVector.h"
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@ -387,14 +385,22 @@ public:
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LSU(llvm::make_unique<LSUnit>(LoadQueueSize, StoreQueueSize,
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AssumeNoAlias)) {}
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// Stalls generated by the scheduler.
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enum StallKind {
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NoStall,
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LoadQueueFull,
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StoreQueueFull,
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SchedulerQueueFull,
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DispatchGroupStall
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};
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/// Check if the instruction in 'IR' can be dispatched.
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///
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/// The DispatchStage is responsible for querying the Scheduler before
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/// dispatching new instructions. This routine is used for performing such
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/// a query. If the instruction 'IR' can be dispatched, then true is
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/// returned, otherwise false is returned with Event set to the stall type.
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bool canBeDispatched(const InstRef &IR,
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HWStallEvent::GenericEventType &Event) const;
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bool canBeDispatched(const InstRef &IR, StallKind &Event) const;
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/// Returns true if there is availibility for IR in the LSU.
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bool isReady(const InstRef &IR) const { return LSU->isReady(IR); }
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