forked from OSchip/llvm-project
[X86] Remove dead code from retpoline thunk generation
Follow-up to r325049 llvm-svn: 325085
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293a0556f3
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@ -74,7 +74,6 @@ private:
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void createThunkFunction(Module &M, StringRef Name);
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void createThunkFunction(Module &M, StringRef Name);
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void insertRegReturnAddrClobber(MachineBasicBlock &MBB, unsigned Reg);
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void insertRegReturnAddrClobber(MachineBasicBlock &MBB, unsigned Reg);
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void insert32BitPushReturnAddrClobber(MachineBasicBlock &MBB);
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void populateThunk(MachineFunction &MF, Optional<unsigned> Reg = None);
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void populateThunk(MachineFunction &MF, Optional<unsigned> Reg = None);
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};
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};
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@ -225,31 +224,6 @@ void X86RetpolineThunks::insertRegReturnAddrClobber(MachineBasicBlock &MBB,
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.addReg(Reg);
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.addReg(Reg);
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}
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}
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void X86RetpolineThunks::insert32BitPushReturnAddrClobber(
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MachineBasicBlock &MBB) {
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// The instruction sequence we use to replace the return address without
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// a scratch register is somewhat complicated:
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// # Clear capture_spec from return address.
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// addl $4, %esp
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// # Top of stack words are: Callee, RA. Exchange Callee and RA.
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// pushl 4(%esp) # Push callee
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// pushl 4(%esp) # Push RA
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// popl 8(%esp) # Pop RA to final RA
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// popl (%esp) # Pop callee to next top of stack
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// retl # Ret to callee
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BuildMI(&MBB, DebugLoc(), TII->get(X86::ADD32ri), X86::ESP)
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.addReg(X86::ESP)
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.addImm(4);
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addRegOffset(BuildMI(&MBB, DebugLoc(), TII->get(X86::PUSH32rmm)), X86::ESP,
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false, 4);
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addRegOffset(BuildMI(&MBB, DebugLoc(), TII->get(X86::PUSH32rmm)), X86::ESP,
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false, 4);
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addRegOffset(BuildMI(&MBB, DebugLoc(), TII->get(X86::POP32rmm)), X86::ESP,
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false, 8);
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addRegOffset(BuildMI(&MBB, DebugLoc(), TII->get(X86::POP32rmm)), X86::ESP,
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false, 0);
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}
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void X86RetpolineThunks::populateThunk(MachineFunction &MF,
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void X86RetpolineThunks::populateThunk(MachineFunction &MF,
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Optional<unsigned> Reg) {
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Optional<unsigned> Reg) {
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// Set MF properties. We never use vregs...
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// Set MF properties. We never use vregs...
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