forked from OSchip/llvm-project
pr6652: Use LDM to restore PC to the return address on ARMv4.
Patch by John Tytgat! llvm-svn: 99096
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@ -1155,19 +1155,24 @@ namespace {
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};
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}
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/// MergeReturnIntoLDM - If this is a exit BB, try merging the return op
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/// (bx lr) into the preceeding stack restore so it directly restore the value
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/// of LR into pc.
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/// ldmfd sp!, {r7, lr}
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/// MergeReturnIntoLDM - If this is a exit BB, try merging the return ops
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/// ("bx lr" and "mov pc, lr") into the preceeding stack restore so it
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/// directly restore the value of LR into pc.
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/// ldmfd sp!, {..., lr}
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/// bx lr
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/// or
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/// ldmfd sp!, {..., lr}
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/// mov pc, lr
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/// =>
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/// ldmfd sp!, {r7, pc}
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/// ldmfd sp!, {..., pc}
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bool ARMLoadStoreOpt::MergeReturnIntoLDM(MachineBasicBlock &MBB) {
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if (MBB.empty()) return false;
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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if (MBBI != MBB.begin() &&
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(MBBI->getOpcode() == ARM::BX_RET || MBBI->getOpcode() == ARM::tBX_RET)) {
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(MBBI->getOpcode() == ARM::BX_RET ||
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MBBI->getOpcode() == ARM::tBX_RET ||
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MBBI->getOpcode() == ARM::MOVPCLR)) {
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MachineInstr *PrevMI = prior(MBBI);
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if (PrevMI->getOpcode() == ARM::LDM_UPD ||
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PrevMI->getOpcode() == ARM::t2LDM_UPD) {
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@ -0,0 +1,13 @@
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; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s
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; RUN: llc < %s -mtriple=armv5-unknown-eabi | FileCheck %s
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; RUN: llc < %s -mtriple=armv6-unknown-eabi | FileCheck %s
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define i32 @bar(i32 %a) nounwind {
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entry:
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%0 = tail call i32 @foo(i32 %a) nounwind ; <i32> [#uses=1]
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%1 = add nsw i32 %0, 3 ; <i32> [#uses=1]
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; CHECK: ldmia sp!, {r11, pc}
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ret i32 %1
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}
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declare i32 @foo(i32)
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