forked from OSchip/llvm-project
Added code generation for function prologues and epilogues.
llvm-svn: 4930
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@ -12,6 +12,7 @@
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/MachineInstrInfo.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Target/TargetMachine.h"
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@ -73,6 +74,12 @@ namespace {
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RegClassIdx.clear();
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}
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void cleanupAfterFunction() {
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RegMap.clear();
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SSA2PhysRegMap.clear();
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NumBytesAllocated = 0;
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}
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/// Moves value from memory into that register
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MachineBasicBlock::iterator
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moveUseToReg (MachineBasicBlock::iterator I, unsigned VirtReg,
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@ -150,7 +157,7 @@ RegAllocSimple::moveUseToReg (MachineBasicBlock::iterator I,
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// Add move instruction(s)
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return RegInfo->loadRegOffset2Reg(CurrMBB, I, PhysReg,
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RegInfo->getFramePointer(),
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stackOffset, regClass->getDataSize());
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-stackOffset, regClass->getDataSize());
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}
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MachineBasicBlock::iterator
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@ -160,12 +167,12 @@ RegAllocSimple::saveVirtRegToStack (MachineBasicBlock::iterator I,
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const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
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assert(regClass);
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unsigned offset = allocateStackSpaceFor(VirtReg, regClass);
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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// Add move instruction(s)
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return RegInfo->storeReg2RegOffset(CurrMBB, I, PhysReg,
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RegInfo->getFramePointer(),
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offset, regClass->getDataSize());
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-stackOffset, regClass->getDataSize());
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}
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MachineBasicBlock::iterator
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@ -184,23 +191,12 @@ RegAllocSimple::savePhysRegToStack (MachineBasicBlock::iterator I,
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}
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bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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RegMap.clear();
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cleanupAfterFunction();
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unsigned virtualReg, physReg;
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DEBUG(std::cerr << "Machine Function " << "\n");
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MF = &Fn;
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#if 0
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// FIXME: add prolog. we should preserve callee-save registers...
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MachineFunction::iterator Fi = Fn.begin();
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MachineBasicBlock &MBB = *Fi;
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MachineBasicBlock::iterator MBBi = MBB.begin()
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const unsigned* calleeSaveRegs = tm.getCalleeSaveRegs();
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while (*calleeSaveRegs) {
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//MBBi = saveRegToStack(MBBi, *calleeSaveRegs,
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++calleeSaveRegs;
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}
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#endif
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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{
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@ -252,7 +248,26 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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}
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// FIXME: add epilog. we should preserve callee-save registers...
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// add prologue we should preserve callee-save registers...
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MachineFunction::iterator Fi = Fn.begin();
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MachineBasicBlock *MBB = Fi;
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MachineBasicBlock::iterator MBBi = MBB->begin();
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RegInfo->emitPrologue(MBB, MBBi, NumBytesAllocated);
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// add epilogue to restore the callee-save registers
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// loop over the basic block
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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{
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// check if last instruction is a RET
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MachineBasicBlock::iterator I = (*MBB).end();
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MachineInstr *MI = *(--I);
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const MachineInstrInfo &MII = TM.getInstrInfo();
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if (MII.isReturn(MI->getOpcode())) {
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// this block has a return instruction, add epilogue
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RegInfo->emitEpilogue(MBB, I, NumBytesAllocated);
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}
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}
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return false; // We never modify the LLVM itself.
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}
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