forked from OSchip/llvm-project
clang/test/CodeGenOpenCL/shifts.cl: Fixup for -Asserts.
llvm-svn: 171820
This commit is contained in:
parent
845d7d8302
commit
160087b1f6
|
@ -5,24 +5,24 @@
|
|||
|
||||
//CHECK: @positiveShift32
|
||||
int positiveShift32(int a,int b) {
|
||||
//CHECK: %shl.mask = and i32 %b, 31
|
||||
//CHECK-NEXT: %shl = shl i32 %a, %shl.mask
|
||||
//CHECK: [[M32:%.+]] = and i32 %b, 31
|
||||
//CHECK-NEXT: [[C32:%.+]] = shl i32 %a, [[M32]]
|
||||
int c = a<<b;
|
||||
int d = ((int)1)<<33;
|
||||
//CHECK-NEXT: %add = add nsw i32 %shl, 2
|
||||
//CHECK-NEXT: [[E32:%.+]] = add nsw i32 [[C32]], 2
|
||||
int e = c + d;
|
||||
//CHECK-NEXT: ret i32 %add
|
||||
//CHECK-NEXT: ret i32 [[E32]]
|
||||
return e;
|
||||
}
|
||||
|
||||
//CHECK: @positiveShift64
|
||||
long positiveShift64(long a,long b) {
|
||||
//CHECK: %shr.mask = and i64 %b, 63
|
||||
//CHECK-NEXT: %shr = ashr i64 %a, %shr.mask
|
||||
//CHECK: [[M64:%.+]] = and i64 %b, 63
|
||||
//CHECK-NEXT: [[C64:%.+]] = ashr i64 %a, [[M64]]
|
||||
long c = a>>b;
|
||||
long d = ((long)8)>>65;
|
||||
//CHECK-NEXT: %add = add nsw i64 %shr, 4
|
||||
//CHECK-NEXT: [[E64:%.+]] = add nsw i64 [[C64]], 4
|
||||
long e = c + d;
|
||||
//CHECK-NEXT: ret i64 %add
|
||||
//CHECK-NEXT: ret i64 [[E64]]
|
||||
return e;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue