forked from OSchip/llvm-project
[AVR] Fix def state of operands
Some instructions (especially mov+pop instructions) were setting the wrong operands. For example, the pop instruction had the register set as a source operand while it is a destination operand (the value is loaded into the register). I have found these issues using the machine verifier and using manual code inspection. Differential Revision: https://reviews.llvm.org/D97159
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@ -650,10 +650,10 @@ bool AVRExpandPseudo::expand<AVR::LDWRdPtr>(Block &MBB, BlockIt MBBI) {
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if (TmpReg) {
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// Move the high byte into the final destination.
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buildMI(MBB, MBBI, AVR::MOVRdRr).addReg(DstHiReg).addReg(TmpReg);
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buildMI(MBB, MBBI, AVR::MOVRdRr, DstHiReg).addReg(TmpReg);
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// Move the low byte from the scratch space into the final destination.
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buildMI(MBB, MBBI, AVR::POPRd).addReg(DstLoReg);
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buildMI(MBB, MBBI, AVR::POPRd, DstLoReg);
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}
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MIBLO.setMemRefs(MI.memoperands());
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@ -767,10 +767,10 @@ bool AVRExpandPseudo::expand<AVR::LDDWRdPtrQ>(Block &MBB, BlockIt MBBI) {
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if (TmpReg) {
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// Move the high byte into the final destination.
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buildMI(MBB, MBBI, AVR::MOVRdRr).addReg(DstHiReg).addReg(TmpReg);
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buildMI(MBB, MBBI, AVR::MOVRdRr, DstHiReg).addReg(TmpReg);
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// Move the low byte from the scratch space into the final destination.
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buildMI(MBB, MBBI, AVR::POPRd).addReg(DstLoReg);
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buildMI(MBB, MBBI, AVR::POPRd, DstLoReg);
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}
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MIBLO.setMemRefs(MI.memoperands());
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@ -815,10 +815,10 @@ bool AVRExpandPseudo::expand<AVR::LPMWRdZ>(Block &MBB, BlockIt MBBI) {
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if (TmpReg) {
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// Move the high byte into the final destination.
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buildMI(MBB, MBBI, AVR::MOVRdRr).addReg(DstHiReg).addReg(TmpReg);
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buildMI(MBB, MBBI, AVR::MOVRdRr, DstHiReg).addReg(TmpReg);
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// Move the low byte from the scratch space into the final destination.
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buildMI(MBB, MBBI, AVR::POPRd).addReg(DstLoReg);
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buildMI(MBB, MBBI, AVR::POPRd, DstLoReg);
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}
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MIBLO.setMemRefs(MI.memoperands());
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@ -1750,8 +1750,9 @@ bool AVRExpandPseudo::expand<AVR::ASRW8Rd>(Block &MBB, BlockIt MBBI) {
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.addReg(DstHiReg, getKillRegState(DstIsKill));
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// Move the sign bit to the C flag.
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buildMI(MBB, MBBI, AVR::ADDRdRr).addReg(DstHiReg)
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.addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead))
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buildMI(MBB, MBBI, AVR::ADDRdRr)
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.addReg(DstHiReg, RegState::Define, getDeadRegState(DstIsDead))
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.addReg(DstHiReg, getKillRegState(DstIsKill) | getDeadRegState(DstIsDead))
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.addReg(DstHiReg, getKillRegState(DstIsKill));
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// Set upper byte to 0 or -1.
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@ -113,7 +113,7 @@ bool AVRRelaxMem::relax<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) {
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// Pop the original state of the pointer register.
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buildMI(MBB, MBBI, AVR::POPWRd)
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.addReg(Ptr.getReg(), getKillRegState(Ptr.isKill()));
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.addDef(Ptr.getReg(), getKillRegState(Ptr.isKill()));
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MI.removeFromParent();
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}
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@ -26,6 +26,6 @@ body: |
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; CHECK-NEXT: PUSHWRr $r29r28, implicit-def $sp, implicit $sp
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; CHECK-NEXT: $r29r28 = SBCIWRdK $r29r28, -64, implicit-def $sreg, implicit $sreg
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; CHECK-NEXT: STWPtrRr $r29r28, $r1r0
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; CHECK-NEXT: POPWRd $r29r28, implicit-def $sp, implicit $sp
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; CHECK-NEXT: $r29r28 = POPWRd implicit-def $sp, implicit $sp
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STDWPtrQRr $r29r28, 64, $r1r0
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...
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