diff --git a/llvm/test/CodeGen/ARM/bic.ll b/llvm/test/CodeGen/ARM/bic.ll
index b16dcc6755b1..5c6044dad7d4 100644
--- a/llvm/test/CodeGen/ARM/bic.ll
+++ b/llvm/test/CodeGen/ARM/bic.ll
@@ -6,8 +6,12 @@ define i32 @f1(i32 %a, i32 %b) {
     ret i32 %tmp1
 }
 
+; CHECK: bic	r0, r0, r1
+
 define i32 @f2(i32 %a, i32 %b) {
     %tmp = xor i32 %b, 4294967295
     %tmp1 = and i32 %tmp, %a
     ret i32 %tmp1
 }
+
+; CHECK: bic	r0, r0, r1
diff --git a/llvm/test/CodeGen/ARM/fptoint.ll b/llvm/test/CodeGen/ARM/fptoint.ll
index 4cacc5de7eec..f4906ff10735 100644
--- a/llvm/test/CodeGen/ARM/fptoint.ll
+++ b/llvm/test/CodeGen/ARM/fptoint.ll
@@ -1,5 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep -E {vmov\\W*r\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | not grep fmrrd
+; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | FileCheck %s
 
 @i = weak global i32 0		; <i32*> [#uses=2]
 @u = weak global i32 0		; <i32*> [#uses=2]
@@ -45,3 +44,7 @@ define void @foo9(double %x) {
 	store i16 %tmp, i16* null
 	ret void
 }
+
+; CHECK: vmov	d0, r0, r1
+; CHECK-NOT: fmrrd
+
diff --git a/llvm/test/CodeGen/ARM/fsubs.ll b/llvm/test/CodeGen/ARM/fsubs.ll
index f84ccdd480b2..ae98be307892 100644
--- a/llvm/test/CodeGen/ARM/fsubs.ll
+++ b/llvm/test/CodeGen/ARM/fsubs.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vsub.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vsub.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1
-; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vsub.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1
+; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0
 
 define float @test(float %a, float %b) {
 entry:
@@ -8,3 +8,6 @@ entry:
 	ret float %0
 }
 
+; VFP2: vsub.f32	s0, s1, s0
+; NFP1: vsub.f32	d0, d1, d0
+; NFP0: vsub.f32	s0, s1, s0
diff --git a/llvm/test/CodeGen/ARM/mls.ll b/llvm/test/CodeGen/ARM/mls.ll
index 85407fa254b0..a6cdba445451 100644
--- a/llvm/test/CodeGen/ARM/mls.ll
+++ b/llvm/test/CodeGen/ARM/mls.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+v6t2 | grep {mls\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | count 1
+; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
 
 define i32 @f1(i32 %a, i32 %b, i32 %c) {
     %tmp1 = mul i32 %a, %b
@@ -12,3 +12,5 @@ define i32 @f2(i32 %a, i32 %b, i32 %c) {
     %tmp2 = sub i32 %tmp1, %c
     ret i32 %tmp2
 }
+
+; CHECK: mls	r0, r0, r1, r2
diff --git a/llvm/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll b/llvm/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll
index d7072dd9b5d7..b508026c21f6 100644
--- a/llvm/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll
+++ b/llvm/test/CodeGen/PIC16/2009-07-17-PR4566-pic16.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=pic16 | grep {movf \\+@i + 0, \\+W}
+; RUN: llc < %s -march=pic16 | FileCheck %s
 
 target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-f32:32:32"
 target triple = "pic16-"
@@ -27,3 +27,5 @@ entry:
 	store i8 %conv8, i8* %tmp9
 	ret void
 }
+
+; CHECK: movf @i + 0, W
diff --git a/llvm/test/CodeGen/PowerPC/bswap-load-store.ll b/llvm/test/CodeGen/PowerPC/bswap-load-store.ll
index 7eb3bbb8d308..3d45b7f6a66f 100644
--- a/llvm/test/CodeGen/PowerPC/bswap-load-store.ll
+++ b/llvm/test/CodeGen/PowerPC/bswap-load-store.ll
@@ -1,11 +1,6 @@
-; RUN: llc < %s -march=ppc32 | \
-; RUN:   grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
-; RUN: llc < %s -march=ppc32 | not grep rlwinm
-; RUN: llc < %s -march=ppc32 | not grep rlwimi
-; RUN: llc < %s -march=ppc64 | \
-; RUN:   grep {stwbrx\\|lwbrx\\|sthbrx\\|lhbrx} | count 4
-; RUN: llc < %s -march=ppc64 | not grep rlwinm
-; RUN: llc < %s -march=ppc64 | not grep rlwimi
+; RUN: llc < %s -march=ppc32 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -march=ppc64 | FileCheck %s -check-prefix=X64
+
 
 define void @STWBRX(i32 %i, i8* %ptr, i32 %off) {
         %tmp1 = getelementptr i8* %ptr, i32 %off                ; <i8*> [#uses=1]
@@ -43,3 +38,18 @@ declare i32 @llvm.bswap.i32(i32)
 
 declare i16 @llvm.bswap.i16(i16)
 
+
+; X32: stwbrx 3, 4, 5
+; X32: lwbrx 3, 3, 4
+; X32: sthbrx 3, 4, 5
+; X32: lhbrx 3, 3, 4
+; X32-NOT: rlwinm
+; X32-NOT: rlwimi
+
+; X32: stwbrx 3, 4, 5
+; X32: lwbrx 3, 3, 4
+; X32: sthbrx 3, 4, 5
+; X32: lhbrx 3, 3, 4
+; X64-NOT: rlwinm
+; X64-NOT: rlwimi
+
diff --git a/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll b/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
index 878fa51d5dc3..ad7f9f7d1c11 100644
--- a/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep -A 2 {call.*f} | grep movl
+; RUN: llc < %s -march=x86 | FileCheck %s
 ; Check the register copy comes after the call to f and before the call to g
 ; PR3784
 
@@ -26,3 +26,7 @@ lpad:		; preds = %cont, %entry
 	%y = phi i32 [ %a, %entry ], [ %aa, %cont ]		; <i32> [#uses=1]
 	ret i32 %y
 }
+
+; CHECK: call{{.*}}f
+; CHECK-NEXT: Llabel1:
+; CHECK-NEXT: movl %eax, %esi
diff --git a/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll b/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
index adbd241cd98f..11c410173fcb 100644
--- a/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
+++ b/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
+; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s
 ; Check that register copies in the landing pad come after the EH_LABEL
 
 declare i32 @f()
@@ -19,3 +19,6 @@ lpad:		; preds = %cont, %entry
 	%v = phi i32 [ %x, %entry ], [ %a, %cont ]		; <i32> [#uses=1]
 	ret i32 %v
 }
+
+; CHECK: lpad
+; CHECK-NEXT: Llabel
diff --git a/llvm/test/CodeGen/X86/fp_constant_op.ll b/llvm/test/CodeGen/X86/fp_constant_op.ll
index 8e823ede56a0..e7bcce13bbdd 100644
--- a/llvm/test/CodeGen/X86/fp_constant_op.ll
+++ b/llvm/test/CodeGen/X86/fp_constant_op.ll
@@ -1,6 +1,4 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \
-; RUN:   grep {fadd\\|fsub\\|fdiv\\|fmul} | not grep -i ST
-
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
 ; Test that the load of the constant is folded into the operation.
 
 
@@ -8,11 +6,14 @@ define double @foo_add(double %P) {
 	%tmp.1 = fadd double %P, 1.230000e+02		; <double> [#uses=1]
 	ret double %tmp.1
 }
+; CHECK: fadd {{[^sS][^tT]}}
+; CHECK: fadd {{[^sS][^tT]}}
 
 define double @foo_mul(double %P) {
 	%tmp.1 = fmul double %P, 1.230000e+02		; <double> [#uses=1]
 	ret double %tmp.1
 }
+; CHECK: fmul {{[^sS][^tT]}}
 
 define double @foo_sub(double %P) {
 	%tmp.1 = fsub double %P, 1.230000e+02		; <double> [#uses=1]
@@ -33,3 +34,9 @@ define double @foo_divr(double %P) {
 	%tmp.1 = fdiv double 1.230000e+02, %P		; <double> [#uses=1]
 	ret double %tmp.1
 }
+
+
+; CHECK: fsub {{[^sS][^tT]}}
+; CHECK: fdiv {{[^sS][^tT]}}
+; CHECK: fdiv {{[^sS][^tT]}}
+
diff --git a/llvm/test/CodeGen/X86/tailcall-stackalign.ll b/llvm/test/CodeGen/X86/tailcall-stackalign.ll
index 110472c8b9f3..0233139e8082 100644
--- a/llvm/test/CodeGen/X86/tailcall-stackalign.ll
+++ b/llvm/test/CodeGen/X86/tailcall-stackalign.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s  -mtriple=i686-unknown-linux  -tailcallopt | grep -A 1 call | grep -A 1 tailcaller | grep subl | grep 12
+; RUN: llc < %s  -mtriple=i686-unknown-linux  -tailcallopt | FileCheck %s
 ; Linux has 8 byte alignment so the params cause stack size 20 when tailcallopt
 ; is enabled, ensure that a normal fastcc call has matching stack size
 
@@ -19,6 +19,5 @@ define i32 @main(i32 %argc, i8** %argv) {
  ret i32 0
 }
 
-
-
-
+; CHECK: call tailcaller
+; CHECK-NEXT: subl $12
diff --git a/llvm/test/CodeGen/X86/trunc-to-bool.ll b/llvm/test/CodeGen/X86/trunc-to-bool.ll
index 374d404a968c..4cdf478f47be 100644
--- a/llvm/test/CodeGen/X86/trunc-to-bool.ll
+++ b/llvm/test/CodeGen/X86/trunc-to-bool.ll
@@ -1,13 +1,13 @@
 ; An integer truncation to i1 should be done with an and instruction to make
 ; sure only the LSBit survives. Test that this is the case both for a returned
 ; value and as the operand of a branch.
-; RUN: llc < %s -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \
-; RUN:   count 5
+; RUN: llc < %s -march=x86 | FileCheck %s
 
 define i1 @test1(i32 %X) zeroext {
     %Y = trunc i32 %X to i1
     ret i1 %Y
 }
+; CHECK: andl $1, %eax
 
 define i1 @test2(i32 %val, i32 %mask) {
 entry:
@@ -20,6 +20,7 @@ ret_true:
 ret_false:
     ret i1 false
 }
+; CHECK: testb $1, %al
 
 define i32 @test3(i8* %ptr) {
     %val = load i8* %ptr
@@ -30,6 +31,7 @@ cond_true:
 cond_false:
     ret i32 42
 }
+; CHECK: testb $1, %al
 
 define i32 @test4(i8* %ptr) {
     %tmp = ptrtoint i8* %ptr to i1
@@ -39,6 +41,7 @@ cond_true:
 cond_false:
     ret i32 42
 }
+; CHECK: testb $1, %al
 
 define i32 @test6(double %d) {
     %tmp = fptosi double %d to i1
@@ -48,4 +51,4 @@ cond_true:
 cond_false:
     ret i32 42
 }
-
+; CHECK: testb $1, %al