[PowerPC] only check the load instruction result number 0.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D102596
This commit is contained in:
Chen Zheng 2021-05-17 03:16:55 -04:00
parent 5a9b25e15b
commit 15d4ed6d8c
2 changed files with 10 additions and 7 deletions

View File

@ -14627,12 +14627,15 @@ SDValue PPCTargetLowering::combineVReverseMemOP(ShuffleVectorSDNode *SVN,
return SDValue();
if (LSBase->getOpcode() == ISD::LOAD) {
// If the load has more than one user except the shufflevector instruction,
// it is not profitable to replace the shufflevector with a reverse load.
if (!LSBase->hasOneUse())
return SDValue();
// If the load return value 0 has more than one user except the
// shufflevector instruction, it is not profitable to replace the
// shufflevector with a reverse load.
for (SDNode::use_iterator UI = LSBase->use_begin(), UE = LSBase->use_end();
UI != UE; ++UI)
if (UI.getUse().getResNo() == 0 && UI->getOpcode() != ISD::VECTOR_SHUFFLE)
return SDValue();
SDLoc dl(SVN);
SDLoc dl(LSBase);
SDValue LoadOps[] = {LSBase->getChain(), LSBase->getBasePtr()};
return DAG.getMemIntrinsicNode(
PPCISD::LOAD_VEC_BE, dl, DAG.getVTList(VT, MVT::Other), LoadOps,

View File

@ -5,9 +5,9 @@
define <2 x double> @loadChainHasUser(<2 x double>* %p1, <2 x double> %v2) {
; CHECK-LABEL: loadChainHasUser:
; CHECK: # %bb.0:
; CHECK-NEXT: lxv 0, 0(3)
; CHECK-NEXT: lxvd2x 0, 0, 3
; CHECK-NEXT: stxv 34, 0(3)
; CHECK-NEXT: xxswapd 34, 0
; CHECK-NEXT: xxlor 34, 0, 0
; CHECK-NEXT: blr
%v1 = load <2 x double>, <2 x double>* %p1
store <2 x double> %v2, <2 x double>* %p1, align 16