forked from OSchip/llvm-project
[PowerPC] only check the load instruction result number 0.
Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D102596
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@ -14627,12 +14627,15 @@ SDValue PPCTargetLowering::combineVReverseMemOP(ShuffleVectorSDNode *SVN,
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return SDValue();
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if (LSBase->getOpcode() == ISD::LOAD) {
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// If the load has more than one user except the shufflevector instruction,
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// it is not profitable to replace the shufflevector with a reverse load.
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if (!LSBase->hasOneUse())
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return SDValue();
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// If the load return value 0 has more than one user except the
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// shufflevector instruction, it is not profitable to replace the
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// shufflevector with a reverse load.
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for (SDNode::use_iterator UI = LSBase->use_begin(), UE = LSBase->use_end();
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UI != UE; ++UI)
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if (UI.getUse().getResNo() == 0 && UI->getOpcode() != ISD::VECTOR_SHUFFLE)
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return SDValue();
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SDLoc dl(SVN);
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SDLoc dl(LSBase);
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SDValue LoadOps[] = {LSBase->getChain(), LSBase->getBasePtr()};
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return DAG.getMemIntrinsicNode(
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PPCISD::LOAD_VEC_BE, dl, DAG.getVTList(VT, MVT::Other), LoadOps,
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@ -5,9 +5,9 @@
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define <2 x double> @loadChainHasUser(<2 x double>* %p1, <2 x double> %v2) {
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; CHECK-LABEL: loadChainHasUser:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lxv 0, 0(3)
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; CHECK-NEXT: lxvd2x 0, 0, 3
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; CHECK-NEXT: stxv 34, 0(3)
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; CHECK-NEXT: xxswapd 34, 0
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; CHECK-NEXT: xxlor 34, 0, 0
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; CHECK-NEXT: blr
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%v1 = load <2 x double>, <2 x double>* %p1
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store <2 x double> %v2, <2 x double>* %p1, align 16
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