forked from OSchip/llvm-project
[NFC] TypePromotion tests
This commit is contained in:
Sam Parker
parent
415267407d
commit
158a734663
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@ -0,0 +1,366 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -mtriple=aarch64 -type-promotion -verify -S %s -o - | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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define dso_local i32 @ic_strcmp(i8* nocapture readonly %arg, i8* nocapture readonly %arg1) {
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; CHECK-LABEL: @ic_strcmp(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[ARG:%.*]], align 1
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; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[I]] to i32
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; CHECK-NEXT: [[I2:%.*]] = icmp eq i32 [[TMP0]], 0
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; CHECK-NEXT: br i1 [[I2]], label [[BB25:%.*]], label [[BB3:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: [[I4:%.*]] = phi i64 [ [[I16:%.*]], [[BB15:%.*]] ], [ 0, [[BB:%.*]] ]
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; CHECK-NEXT: [[I5:%.*]] = phi i32 [ [[TMP2:%.*]], [[BB15]] ], [ [[TMP0]], [[BB]] ]
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; CHECK-NEXT: [[I6:%.*]] = phi i32 [ [[I17:%.*]], [[BB15]] ], [ 0, [[BB]] ]
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; CHECK-NEXT: [[I7:%.*]] = getelementptr inbounds i8, i8* [[ARG1:%.*]], i64 [[I4]]
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; CHECK-NEXT: [[I8:%.*]] = load i8, i8* [[I7]], align 1
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; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[I8]] to i32
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; CHECK-NEXT: [[I9:%.*]] = icmp eq i32 [[TMP1]], 0
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; CHECK-NEXT: br i1 [[I9]], label [[BB23:%.*]], label [[BB10:%.*]]
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; CHECK: bb10:
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; CHECK-NEXT: [[I11:%.*]] = icmp eq i32 [[I5]], [[TMP1]]
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; CHECK-NEXT: [[I12:%.*]] = xor i32 [[I5]], 32
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; CHECK-NEXT: [[I13:%.*]] = icmp eq i32 [[I12]], [[TMP1]]
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; CHECK-NEXT: [[I14:%.*]] = or i1 [[I11]], [[I13]]
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; CHECK-NEXT: br i1 [[I14]], label [[BB15]], label [[BB21:%.*]]
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; CHECK: bb15:
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; CHECK-NEXT: [[I16]] = add nuw i64 [[I4]], 1
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; CHECK-NEXT: [[I17]] = add nuw nsw i32 [[I6]], 1
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; CHECK-NEXT: [[I18:%.*]] = getelementptr inbounds i8, i8* [[ARG]], i64 [[I16]]
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; CHECK-NEXT: [[I19:%.*]] = load i8, i8* [[I18]], align 1
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; CHECK-NEXT: [[TMP2]] = zext i8 [[I19]] to i32
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; CHECK-NEXT: [[I20:%.*]] = icmp eq i32 [[TMP2]], 0
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; CHECK-NEXT: br i1 [[I20]], label [[BB25]], label [[BB3]]
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; CHECK: bb21:
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; CHECK-NEXT: [[I22:%.*]] = trunc i64 [[I4]] to i32
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; CHECK-NEXT: br label [[BB25]]
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; CHECK: bb23:
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; CHECK-NEXT: [[I24:%.*]] = trunc i64 [[I4]] to i32
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; CHECK-NEXT: br label [[BB25]]
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; CHECK: bb25:
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; CHECK-NEXT: [[I26:%.*]] = phi i32 [ 0, [[BB]] ], [ [[I22]], [[BB21]] ], [ [[I24]], [[BB23]] ], [ [[I17]], [[BB15]] ]
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; CHECK-NEXT: [[I27:%.*]] = phi i32 [ 0, [[BB]] ], [ [[I5]], [[BB21]] ], [ [[I5]], [[BB23]] ], [ 0, [[BB15]] ]
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; CHECK-NEXT: [[I28:%.*]] = zext i32 [[I26]] to i64
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; CHECK-NEXT: [[I29:%.*]] = getelementptr inbounds i8, i8* [[ARG1]], i64 [[I28]]
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; CHECK-NEXT: [[I30:%.*]] = load i8, i8* [[I29]], align 1
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; CHECK-NEXT: [[TMP3:%.*]] = zext i8 [[I30]] to i32
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; CHECK-NEXT: [[I31:%.*]] = icmp eq i32 [[I27]], [[TMP3]]
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; CHECK-NEXT: [[I32:%.*]] = or i32 [[I27]], 32
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; CHECK-NEXT: [[I33:%.*]] = or i32 [[TMP3]], 32
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; CHECK-NEXT: [[I34:%.*]] = icmp ult i32 [[I32]], [[I33]]
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; CHECK-NEXT: [[I35:%.*]] = select i1 [[I34]], i32 -1, i32 1
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; CHECK-NEXT: [[I36:%.*]] = select i1 [[I31]], i32 0, i32 [[I35]]
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; CHECK-NEXT: ret i32 [[I36]]
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;
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bb:
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%i = load i8, i8* %arg, align 1
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%i2 = icmp eq i8 %i, 0
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br i1 %i2, label %bb25, label %bb3
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bb3: ; preds = %bb15, %bb
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%i4 = phi i64 [ %i16, %bb15 ], [ 0, %bb ]
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%i5 = phi i8 [ %i19, %bb15 ], [ %i, %bb ]
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%i6 = phi i32 [ %i17, %bb15 ], [ 0, %bb ]
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%i7 = getelementptr inbounds i8, i8* %arg1, i64 %i4
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%i8 = load i8, i8* %i7, align 1
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%i9 = icmp eq i8 %i8, 0
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br i1 %i9, label %bb23, label %bb10
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bb10: ; preds = %bb3
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%i11 = icmp eq i8 %i5, %i8
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%i12 = xor i8 %i5, 32
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%i13 = icmp eq i8 %i12, %i8
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%i14 = or i1 %i11, %i13
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br i1 %i14, label %bb15, label %bb21
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bb15: ; preds = %bb10
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%i16 = add nuw i64 %i4, 1
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%i17 = add nuw nsw i32 %i6, 1
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%i18 = getelementptr inbounds i8, i8* %arg, i64 %i16
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%i19 = load i8, i8* %i18, align 1
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%i20 = icmp eq i8 %i19, 0
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br i1 %i20, label %bb25, label %bb3
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bb21: ; preds = %bb10
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%i22 = trunc i64 %i4 to i32
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br label %bb25
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bb23: ; preds = %bb3
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%i24 = trunc i64 %i4 to i32
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br label %bb25
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bb25: ; preds = %bb23, %bb21, %bb15, %bb
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%i26 = phi i32 [ 0, %bb ], [ %i22, %bb21 ], [ %i24, %bb23 ], [ %i17, %bb15 ]
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%i27 = phi i8 [ 0, %bb ], [ %i5, %bb21 ], [ %i5, %bb23 ], [ 0, %bb15 ]
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%i28 = zext i32 %i26 to i64
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%i29 = getelementptr inbounds i8, i8* %arg1, i64 %i28
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%i30 = load i8, i8* %i29, align 1
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%i31 = icmp eq i8 %i27, %i30
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%i32 = or i8 %i27, 32
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%i33 = or i8 %i30, 32
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%i34 = icmp ult i8 %i32, %i33
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%i35 = select i1 %i34, i32 -1, i32 1
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%i36 = select i1 %i31, i32 0, i32 %i35
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ret i32 %i36
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}
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define dso_local i16 @i16_loop_add_i8(i8* nocapture readonly %arg) {
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; CHECK-LABEL: @i16_loop_add_i8(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[ARG:%.*]], align 1
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; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[I]] to i32
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
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; CHECK-NEXT: [[I1:%.*]] = zext i8 [[TMP1]] to i16
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; CHECK-NEXT: [[I2:%.*]] = add i32 [[TMP0]], -1
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; CHECK-NEXT: [[I3:%.*]] = icmp ult i32 [[I2]], 31
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; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB16:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: [[I5:%.*]] = phi i32 [ [[I7:%.*]], [[BB4]] ], [ 0, [[BB:%.*]] ]
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; CHECK-NEXT: [[I6:%.*]] = phi i16 [ [[I12:%.*]], [[BB4]] ], [ [[I1]], [[BB]] ]
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; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
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; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
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; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i8, i8* [[ARG]], i64 [[I8]]
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; CHECK-NEXT: [[I10:%.*]] = load i8, i8* [[I9]], align 1
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; CHECK-NEXT: [[I11:%.*]] = zext i8 [[I10]] to i16
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; CHECK-NEXT: [[I12]] = add nuw nsw i16 [[I6]], [[I11]]
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; CHECK-NEXT: [[I13:%.*]] = icmp ne i8 [[I10]], 0
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; CHECK-NEXT: [[I14:%.*]] = icmp ult i16 [[I12]], 32
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; CHECK-NEXT: [[I15:%.*]] = select i1 [[I13]], i1 [[I14]], i1 false
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; CHECK-NEXT: br i1 [[I15]], label [[BB4]], label [[BB16]]
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; CHECK: bb16:
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; CHECK-NEXT: [[I17:%.*]] = phi i16 [ [[I1]], [[BB]] ], [ [[I12]], [[BB4]] ]
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; CHECK-NEXT: ret i16 [[I17]]
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;
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bb:
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%i = load i8, i8* %arg, align 1
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%i1 = zext i8 %i to i16
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%i2 = add i8 %i, -1
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%i3 = icmp ult i8 %i2, 31
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br i1 %i3, label %bb4, label %bb16
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bb4: ; preds = %bb4, %bb
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%i5 = phi i32 [ %i7, %bb4 ], [ 0, %bb ]
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%i6 = phi i16 [ %i12, %bb4 ], [ %i1, %bb ]
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%i7 = add i32 %i5, 1
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%i8 = zext i32 %i7 to i64
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%i9 = getelementptr inbounds i8, i8* %arg, i64 %i8
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%i10 = load i8, i8* %i9, align 1
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%i11 = zext i8 %i10 to i16
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%i12 = add nuw nsw i16 %i6, %i11
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%i13 = icmp ne i8 %i10, 0
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%i14 = icmp ult i16 %i12, 32
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%i15 = select i1 %i13, i1 %i14, i1 false
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br i1 %i15, label %bb4, label %bb16
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bb16: ; preds = %bb4, %bb
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%i17 = phi i16 [ %i1, %bb ], [ %i12, %bb4 ]
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ret i16 %i17
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}
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define dso_local i32 @i32_loop_add_i16(i16* nocapture readonly %arg) {
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; CHECK-LABEL: @i32_loop_add_i16(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
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; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[I]] to i32
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; CHECK-NEXT: [[I1:%.*]] = zext i16 [[I]] to i32
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; CHECK-NEXT: [[I2:%.*]] = add i32 [[TMP0]], -1
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; CHECK-NEXT: [[I3:%.*]] = icmp ult i32 [[I2]], 31
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; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB16:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: [[I5:%.*]] = phi i32 [ [[I7:%.*]], [[BB4]] ], [ 0, [[BB:%.*]] ]
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; CHECK-NEXT: [[I6:%.*]] = phi i32 [ [[I12:%.*]], [[BB4]] ], [ [[I1]], [[BB]] ]
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; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
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; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
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; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
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; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
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; CHECK-NEXT: [[I11:%.*]] = zext i16 [[I10]] to i32
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; CHECK-NEXT: [[I12]] = sub nsw i32 [[I6]], [[I11]]
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; CHECK-NEXT: [[I13:%.*]] = icmp ne i16 [[I10]], 0
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; CHECK-NEXT: [[I14:%.*]] = icmp slt i32 [[I12]], 32
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; CHECK-NEXT: [[I15:%.*]] = select i1 [[I13]], i1 [[I14]], i1 false
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; CHECK-NEXT: br i1 [[I15]], label [[BB4]], label [[BB16]]
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; CHECK: bb16:
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; CHECK-NEXT: [[I17:%.*]] = phi i32 [ [[I1]], [[BB]] ], [ [[I12]], [[BB4]] ]
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; CHECK-NEXT: ret i32 [[I17]]
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;
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bb:
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%i = load i16, i16* %arg, align 2
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%i1 = zext i16 %i to i32
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%i2 = add i16 %i, -1
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%i3 = icmp ult i16 %i2, 31
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br i1 %i3, label %bb4, label %bb16
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bb4: ; preds = %bb4, %bb
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%i5 = phi i32 [ %i7, %bb4 ], [ 0, %bb ]
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%i6 = phi i32 [ %i12, %bb4 ], [ %i1, %bb ]
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%i7 = add i32 %i5, 1
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%i8 = zext i32 %i7 to i64
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%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
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%i10 = load i16, i16* %i9, align 2
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%i11 = zext i16 %i10 to i32
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%i12 = sub nsw i32 %i6, %i11
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%i13 = icmp ne i16 %i10, 0
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%i14 = icmp slt i32 %i12, 32
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%i15 = select i1 %i13, i1 %i14, i1 false
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br i1 %i15, label %bb4, label %bb16
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bb16: ; preds = %bb4, %bb
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%i17 = phi i32 [ %i1, %bb ], [ %i12, %bb4 ]
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ret i32 %i17
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}
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define dso_local i32 @i16_loop_add_i16(i16* nocapture readonly %arg) {
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; CHECK-LABEL: @i16_loop_add_i16(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
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; CHECK-NEXT: [[I1:%.*]] = icmp ne i16 [[I]], 0
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; CHECK-NEXT: [[I2:%.*]] = icmp slt i16 [[I]], 32
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; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
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; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB15:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: [[I5:%.*]] = phi i32 [ [[I7:%.*]], [[BB4]] ], [ 0, [[BB:%.*]] ]
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; CHECK-NEXT: [[I6:%.*]] = phi i16 [ [[I11:%.*]], [[BB4]] ], [ [[I]], [[BB]] ]
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; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
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; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
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; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
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; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
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; CHECK-NEXT: [[I11]] = sub i16 [[I6]], [[I10]]
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; CHECK-NEXT: [[I12:%.*]] = icmp ne i16 [[I10]], 0
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; CHECK-NEXT: [[I13:%.*]] = icmp slt i16 [[I11]], 32
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; CHECK-NEXT: [[I14:%.*]] = select i1 [[I12]], i1 [[I13]], i1 false
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; CHECK-NEXT: br i1 [[I14]], label [[BB4]], label [[BB15]]
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; CHECK: bb15:
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; CHECK-NEXT: [[I16:%.*]] = phi i16 [ [[I]], [[BB]] ], [ [[I11]], [[BB4]] ]
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; CHECK-NEXT: [[I17:%.*]] = sext i16 [[I16]] to i32
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; CHECK-NEXT: ret i32 [[I17]]
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;
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bb:
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%i = load i16, i16* %arg, align 2
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%i1 = icmp ne i16 %i, 0
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%i2 = icmp slt i16 %i, 32
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%i3 = and i1 %i1, %i2
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br i1 %i3, label %bb4, label %bb15
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bb4: ; preds = %bb4, %bb
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%i5 = phi i32 [ %i7, %bb4 ], [ 0, %bb ]
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%i6 = phi i16 [ %i11, %bb4 ], [ %i, %bb ]
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%i7 = add i32 %i5, 1
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%i8 = zext i32 %i7 to i64
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%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
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%i10 = load i16, i16* %i9, align 2
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%i11 = sub i16 %i6, %i10
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%i12 = icmp ne i16 %i10, 0
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%i13 = icmp slt i16 %i11, 32
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%i14 = select i1 %i12, i1 %i13, i1 false
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br i1 %i14, label %bb4, label %bb15
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bb15: ; preds = %bb4, %bb
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%i16 = phi i16 [ %i, %bb ], [ %i11, %bb4 ]
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%i17 = sext i16 %i16 to i32
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ret i32 %i17
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}
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define dso_local i32 @i16_loop_sub_i16(i16* nocapture readonly %arg) {
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; CHECK-LABEL: @i16_loop_sub_i16(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
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; CHECK-NEXT: [[I1:%.*]] = icmp ne i16 [[I]], 0
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; CHECK-NEXT: [[I2:%.*]] = icmp slt i16 [[I]], 32
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; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
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; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB15:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: [[I5:%.*]] = phi i32 [ [[I7:%.*]], [[BB4]] ], [ 0, [[BB:%.*]] ]
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; CHECK-NEXT: [[I6:%.*]] = phi i16 [ [[I11:%.*]], [[BB4]] ], [ [[I]], [[BB]] ]
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; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
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; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
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; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
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; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
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; CHECK-NEXT: [[I11]] = sub i16 [[I6]], [[I10]]
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; CHECK-NEXT: [[I12:%.*]] = icmp ne i16 [[I10]], 0
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; CHECK-NEXT: [[I13:%.*]] = icmp slt i16 [[I11]], 32
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; CHECK-NEXT: [[I14:%.*]] = select i1 [[I12]], i1 [[I13]], i1 false
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; CHECK-NEXT: br i1 [[I14]], label [[BB4]], label [[BB15]]
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; CHECK: bb15:
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; CHECK-NEXT: [[I16:%.*]] = phi i16 [ [[I]], [[BB]] ], [ [[I11]], [[BB4]] ]
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; CHECK-NEXT: [[I17:%.*]] = sext i16 [[I16]] to i32
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; CHECK-NEXT: ret i32 [[I17]]
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;
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bb:
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%i = load i16, i16* %arg, align 2
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%i1 = icmp ne i16 %i, 0
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%i2 = icmp slt i16 %i, 32
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%i3 = and i1 %i1, %i2
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br i1 %i3, label %bb4, label %bb15
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bb4: ; preds = %bb4, %bb
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%i5 = phi i32 [ %i7, %bb4 ], [ 0, %bb ]
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%i6 = phi i16 [ %i11, %bb4 ], [ %i, %bb ]
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%i7 = add i32 %i5, 1
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%i8 = zext i32 %i7 to i64
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%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
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%i10 = load i16, i16* %i9, align 2
|
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%i11 = sub i16 %i6, %i10
|
||||
%i12 = icmp ne i16 %i10, 0
|
||||
%i13 = icmp slt i16 %i11, 32
|
||||
%i14 = select i1 %i12, i1 %i13, i1 false
|
||||
br i1 %i14, label %bb4, label %bb15
|
||||
|
||||
bb15: ; preds = %bb4, %bb
|
||||
%i16 = phi i16 [ %i, %bb ], [ %i11, %bb4 ]
|
||||
%i17 = sext i16 %i16 to i32
|
||||
ret i32 %i17
|
||||
}
|
||||
|
||||
define dso_local i32 @i32_loop_sub_i16(i16* nocapture readonly %arg) {
|
||||
; CHECK-LABEL: @i32_loop_sub_i16(
|
||||
; CHECK-NEXT: bb:
|
||||
; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[I]] to i32
|
||||
; CHECK-NEXT: [[I1:%.*]] = zext i16 [[I]] to i32
|
||||
; CHECK-NEXT: [[I2:%.*]] = add i32 [[TMP0]], -1
|
||||
; CHECK-NEXT: [[I3:%.*]] = icmp ult i32 [[I2]], 31
|
||||
; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB16:%.*]]
|
||||
; CHECK: bb4:
|
||||
; CHECK-NEXT: [[I5:%.*]] = phi i32 [ [[I7:%.*]], [[BB4]] ], [ 0, [[BB:%.*]] ]
|
||||
; CHECK-NEXT: [[I6:%.*]] = phi i32 [ [[I12:%.*]], [[BB4]] ], [ [[I1]], [[BB]] ]
|
||||
; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
|
||||
; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
|
||||
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
|
||||
; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
|
||||
; CHECK-NEXT: [[I11:%.*]] = zext i16 [[I10]] to i32
|
||||
; CHECK-NEXT: [[I12]] = sub nsw i32 [[I6]], [[I11]]
|
||||
; CHECK-NEXT: [[I13:%.*]] = icmp ne i16 [[I10]], 0
|
||||
; CHECK-NEXT: [[I14:%.*]] = icmp slt i32 [[I12]], 32
|
||||
; CHECK-NEXT: [[I15:%.*]] = select i1 [[I13]], i1 [[I14]], i1 false
|
||||
; CHECK-NEXT: br i1 [[I15]], label [[BB4]], label [[BB16]]
|
||||
; CHECK: bb16:
|
||||
; CHECK-NEXT: [[I17:%.*]] = phi i32 [ [[I1]], [[BB]] ], [ [[I12]], [[BB4]] ]
|
||||
; CHECK-NEXT: ret i32 [[I17]]
|
||||
;
|
||||
bb:
|
||||
%i = load i16, i16* %arg, align 2
|
||||
%i1 = zext i16 %i to i32
|
||||
%i2 = add i16 %i, -1
|
||||
%i3 = icmp ult i16 %i2, 31
|
||||
br i1 %i3, label %bb4, label %bb16
|
||||
|
||||
bb4: ; preds = %bb4, %bb
|
||||
%i5 = phi i32 [ %i7, %bb4 ], [ 0, %bb ]
|
||||
%i6 = phi i32 [ %i12, %bb4 ], [ %i1, %bb ]
|
||||
%i7 = add i32 %i5, 1
|
||||
%i8 = zext i32 %i7 to i64
|
||||
%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
|
||||
%i10 = load i16, i16* %i9, align 2
|
||||
%i11 = zext i16 %i10 to i32
|
||||
%i12 = sub nsw i32 %i6, %i11
|
||||
%i13 = icmp ne i16 %i10, 0
|
||||
%i14 = icmp slt i32 %i12, 32
|
||||
%i15 = select i1 %i13, i1 %i14, i1 false
|
||||
br i1 %i15, label %bb4, label %bb16
|
||||
|
||||
bb16: ; preds = %bb4, %bb
|
||||
%i17 = phi i32 [ %i1, %bb ], [ %i12, %bb4 ]
|
||||
ret i32 %i17
|
||||
}
|
||||
|
|
@ -487,6 +487,43 @@ if.end:
|
|||
ret i8 %retval
|
||||
}
|
||||
|
||||
define i8 @search_through_zext_4(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c, i32 %d) {
|
||||
; CHECK-LABEL: @search_through_zext_4(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CONV_0:%.*]] = zext i8 [[A:%.*]] to i16
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add nuw i16 [[CONV_0]], [[C:%.*]]
|
||||
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i16 [[ADD]], [[C]]
|
||||
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
|
||||
; CHECK: if.then:
|
||||
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[ADD]] to i8
|
||||
; CHECK-NEXT: [[SUB:%.*]] = sub nuw i8 [[B:%.*]], [[TRUNC]]
|
||||
; CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[SUB]] to i32
|
||||
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CONV2]], [[D:%.*]]
|
||||
; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP2]], i8 [[A]], i8 [[B]]
|
||||
; CHECK-NEXT: br label [[IF_END]]
|
||||
; CHECK: if.end:
|
||||
; CHECK-NEXT: [[RETVAL:%.*]] = phi i8 [ 0, [[ENTRY:%.*]] ], [ [[RES]], [[IF_THEN]] ]
|
||||
; CHECK-NEXT: ret i8 [[RETVAL]]
|
||||
;
|
||||
entry:
|
||||
%conv.0 = zext i8 %a to i16
|
||||
%add = add nuw i16 %conv.0, %c
|
||||
%cmp = icmp ult i16 %add, %c
|
||||
br i1 %cmp, label %if.then, label %if.end
|
||||
|
||||
if.then:
|
||||
%trunc = trunc i16 %add to i8
|
||||
%sub = sub nuw i8 %b, %trunc
|
||||
%conv2 = zext i8 %sub to i32
|
||||
%cmp2 = icmp ugt i32 %conv2, %d
|
||||
%res = select i1 %cmp2, i8 %a, i8 %b
|
||||
br label %if.end
|
||||
|
||||
if.end:
|
||||
%retval = phi i8 [ 0, %entry ], [ %res, %if.then ]
|
||||
ret i8 %retval
|
||||
}
|
||||
|
||||
; TODO: We should be able to remove the uxt that gets introduced for %conv2
|
||||
define i8 @search_through_zext_cmp(i8 zeroext %a, i8 zeroext %b, i16 zeroext %c) {
|
||||
; CHECK-LABEL: @search_through_zext_cmp(
|
||||
|
|
|
|||
Loading…
Reference in New Issue