RISCV: handle 64-bit PCREL data relocations

We would previously fail to handle 64-bit PC-relative relocations on
RISCV.  This was exposed by trying to build with
`-fprofile-instr-generate`.

The original changes restricted the relocation handling to the text
segment as the paired relocations are undesirable in at least the debug
and .eh_frame sections.  We now make this explicit to handle the general
case for the data relocations as well.

It would be preferable to use `R_RISCV_n_PCREL` when available to avoid
an extra relocation.

Differential Revision: https://reviews.llvm.org/D127549
Reviewed By: luismarques, MaskRay

Fixes: #55971
This commit is contained in:
Saleem Abdulrasool 2022-06-10 22:54:17 +00:00
parent ead75d9434
commit 1582bcd003
2 changed files with 50 additions and 4 deletions

View File

@ -207,6 +207,10 @@ class RISCVELFStreamer : public MCELFStreamer {
static bool requiresFixups(MCContext &C, const MCExpr *Value,
const MCExpr *&LHS, const MCExpr *&RHS) {
auto IsMetadataOrEHFrameSection = [](const MCSection &S) -> bool {
return S.getKind().isMetadata() || S.getName() == ".eh_frame";
};
const auto *MBE = dyn_cast<MCBinaryExpr>(Value);
if (MBE == nullptr)
return false;
@ -225,10 +229,15 @@ class RISCVELFStreamer : public MCELFStreamer {
MCConstantExpr::create(E.getConstant(), C), C);
RHS = E.getSymB();
return (A.isInSection() ? A.getSection().hasInstructions()
: !A.getName().empty()) ||
(B.isInSection() ? B.getSection().hasInstructions()
: !B.getName().empty());
// TODO: when available, R_RISCV_n_PCREL should be preferred.
// Avoid pairwise relocations for symbolic difference in debug and .eh_frame
if (A.isInSection())
return !IsMetadataOrEHFrameSection(A.getSection());
if (B.isInSection())
return !IsMetadataOrEHFrameSection(B.getSection());
// as well as for absolute symbols.
return !A.getName().empty() || !B.getName().empty();
}
void reset() override {

View File

@ -0,0 +1,37 @@
# RUN: llvm-mc -triple riscv64-unknown-linux-gnu -filetype obj -o - %s \
# RUN: | llvm-readobj -r - | FileCheck %s
# CHECK: Relocations [
# CHECK: .relasx {
# CHECK-NEXT: 0x0 R_RISCV_ADD64 y 0x0
# CHECK-NEXT: 0x0 R_RISCV_SUB64 x 0x0
# CHECK: }
# CHECK: .relasy {
# CHECK-NEXT: 0x0 R_RISCV_ADD64 x 0x0
# CHECK-NEXT: 0x0 R_RISCV_SUB64 y 0x0
# CHECK: }
# CHECK: .relasz {
# CHECK-NEXT: 0x0 R_RISCV_ADD64 z 0x0
# CHECK-NEXT: 0x0 R_RISCV_SUB64 a 0x0
# CHECK: }
# CHECK: .relasa {
# CHECK-NEXT: 0x0 R_RISCV_ADD64 a 0x0
# CHECK-NEXT: 0x0 R_RISCV_SUB64 z 0x0
# CHECK: }
# CHECK: ]
.section sx,"aw",@progbits
x:
.quad y-x
.section sy,"aw",@progbits
y:
.quad x-y
.section sz
z:
.quad z-a
.section sa
a:
.quad a-z