forked from OSchip/llvm-project
Get the cached subtarget off the MachineFunction rather than
inquiring for a new one from the TargetMachine. llvm-svn: 229998
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@ -224,7 +224,7 @@ def GPRC : RegisterClass<"PPC", [i32], 32, (add (sequence "R%u", 2, 12),
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// put it at the end of the list.
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let AltOrders = [(add (sub GPRC, R2), R2)];
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let AltOrderSelect = [{
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const PPCSubtarget &S = MF.getTarget().getSubtarget<PPCSubtarget>();
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const PPCSubtarget &S = MF.getSubtarget<PPCSubtarget>();
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return S.isPPC64() && S.isSVR4ABI();
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}];
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}
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@ -236,7 +236,7 @@ def G8RC : RegisterClass<"PPC", [i64], 64, (add (sequence "X%u", 2, 12),
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// put it at the end of the list.
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let AltOrders = [(add (sub G8RC, X2), X2)];
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let AltOrderSelect = [{
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const PPCSubtarget &S = MF.getTarget().getSubtarget<PPCSubtarget>();
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const PPCSubtarget &S = MF.getSubtarget<PPCSubtarget>();
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return S.isPPC64() && S.isSVR4ABI();
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}];
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}
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@ -249,7 +249,7 @@ def GPRC_NOR0 : RegisterClass<"PPC", [i32], 32, (add (sub GPRC, R0), ZERO)> {
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// put it at the end of the list.
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let AltOrders = [(add (sub GPRC_NOR0, R2), R2)];
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let AltOrderSelect = [{
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const PPCSubtarget &S = MF.getTarget().getSubtarget<PPCSubtarget>();
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const PPCSubtarget &S = MF.getSubtarget<PPCSubtarget>();
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return S.isPPC64() && S.isSVR4ABI();
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}];
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}
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@ -259,7 +259,7 @@ def G8RC_NOX0 : RegisterClass<"PPC", [i64], 64, (add (sub G8RC, X0), ZERO8)> {
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// put it at the end of the list.
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let AltOrders = [(add (sub G8RC_NOX0, X2), X2)];
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let AltOrderSelect = [{
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const PPCSubtarget &S = MF.getTarget().getSubtarget<PPCSubtarget>();
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const PPCSubtarget &S = MF.getSubtarget<PPCSubtarget>();
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return S.isPPC64() && S.isSVR4ABI();
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}];
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}
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