forked from OSchip/llvm-project
DAGCombiner: Factor common pattern into isNullConstant() function. NFC
llvm-svn: 237633
This commit is contained in:
parent
0c6160156a
commit
1505efb0bb
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@ -1580,6 +1580,11 @@ SDValue DAGCombiner::visitMERGE_VALUES(SDNode *N) {
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return SDValue(N, 0); // Return N so it doesn't get rechecked!
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return SDValue(N, 0); // Return N so it doesn't get rechecked!
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}
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}
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static bool isNullConstant(SDValue V) {
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ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
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return Const != nullptr && Const->isNullValue();
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}
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SDValue DAGCombiner::visitADD(SDNode *N) {
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SDValue DAGCombiner::visitADD(SDNode *N) {
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SDValue N0 = N->getOperand(0);
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SDValue N0 = N->getOperand(0);
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SDValue N1 = N->getOperand(1);
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SDValue N1 = N->getOperand(1);
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@ -1612,7 +1617,7 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
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!isConstantIntBuildVectorOrConstantInt(N1))
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!isConstantIntBuildVectorOrConstantInt(N1))
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return DAG.getNode(ISD::ADD, SDLoc(N), VT, N1, N0);
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return DAG.getNode(ISD::ADD, SDLoc(N), VT, N1, N0);
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// fold (add x, 0) -> x
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// fold (add x, 0) -> x
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if (N1C && N1C->isNullValue())
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if (isNullConstant(N1))
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return N0;
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return N0;
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// fold (add Sym, c) -> Sym+c
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// fold (add Sym, c) -> Sym+c
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if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N0))
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if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N0))
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@ -1634,12 +1639,10 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
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if (SDValue RADD = ReassociateOps(ISD::ADD, SDLoc(N), N0, N1))
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if (SDValue RADD = ReassociateOps(ISD::ADD, SDLoc(N), N0, N1))
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return RADD;
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return RADD;
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// fold ((0-A) + B) -> B-A
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// fold ((0-A) + B) -> B-A
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if (N0.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N0.getOperand(0)) &&
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if (N0.getOpcode() == ISD::SUB && isNullConstant(N0.getOperand(0)))
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cast<ConstantSDNode>(N0.getOperand(0))->isNullValue())
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return DAG.getNode(ISD::SUB, SDLoc(N), VT, N1, N0.getOperand(1));
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return DAG.getNode(ISD::SUB, SDLoc(N), VT, N1, N0.getOperand(1));
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// fold (A + (0-B)) -> A-B
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// fold (A + (0-B)) -> A-B
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if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
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if (N1.getOpcode() == ISD::SUB && isNullConstant(N1.getOperand(0)))
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cast<ConstantSDNode>(N1.getOperand(0))->isNullValue())
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return DAG.getNode(ISD::SUB, SDLoc(N), VT, N0, N1.getOperand(1));
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return DAG.getNode(ISD::SUB, SDLoc(N), VT, N0, N1.getOperand(1));
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// fold (A+(B-A)) -> B
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// fold (A+(B-A)) -> B
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if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
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if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
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@ -1773,7 +1776,7 @@ SDValue DAGCombiner::visitADDC(SDNode *N) {
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return DAG.getNode(ISD::ADDC, SDLoc(N), N->getVTList(), N1, N0);
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return DAG.getNode(ISD::ADDC, SDLoc(N), N->getVTList(), N1, N0);
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// fold (addc x, 0) -> x + no carry out
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// fold (addc x, 0) -> x + no carry out
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if (N1C && N1C->isNullValue())
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if (isNullConstant(N1))
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return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE,
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return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE,
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SDLoc(N), MVT::Glue));
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SDLoc(N), MVT::Glue));
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@ -1955,8 +1958,7 @@ SDValue DAGCombiner::visitSUBC(SDNode *N) {
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// fold (subc x, 0) -> x + no borrow
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// fold (subc x, 0) -> x + no borrow
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ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
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ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
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ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
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if (isNullConstant(N1))
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if (N1C && N1C->isNullValue())
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return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE, SDLoc(N),
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return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE, SDLoc(N),
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MVT::Glue));
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MVT::Glue));
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@ -2120,7 +2122,7 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) {
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// fold (sdiv c1, c2) -> c1/c2
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// fold (sdiv c1, c2) -> c1/c2
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ConstantSDNode *N0C = isConstOrConstSplat(N0);
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ConstantSDNode *N0C = isConstOrConstSplat(N0);
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ConstantSDNode *N1C = isConstOrConstSplat(N1);
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ConstantSDNode *N1C = isConstOrConstSplat(N1);
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if (N0C && N1C && !N1C->isNullValue())
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if (N0C && N1C && N1C->isNullValue())
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return DAG.FoldConstantArithmetic(ISD::SDIV, SDLoc(N), VT, N0C, N1C);
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return DAG.FoldConstantArithmetic(ISD::SDIV, SDLoc(N), VT, N0C, N1C);
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// fold (sdiv X, 1) -> X
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// fold (sdiv X, 1) -> X
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if (N1C && N1C->getAPIntValue() == 1LL)
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if (N1C && N1C->getAPIntValue() == 1LL)
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@ -2360,7 +2362,7 @@ SDValue DAGCombiner::visitMULHS(SDNode *N) {
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SDLoc DL(N);
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SDLoc DL(N);
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// fold (mulhs x, 0) -> 0
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// fold (mulhs x, 0) -> 0
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if (N1C && N1C->isNullValue())
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if (isNullConstant(N1))
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return N1;
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return N1;
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// fold (mulhs x, 1) -> (sra x, size(x)-1)
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// fold (mulhs x, 1) -> (sra x, size(x)-1)
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if (N1C && N1C->getAPIntValue() == 1) {
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if (N1C && N1C->getAPIntValue() == 1) {
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@ -2402,7 +2404,7 @@ SDValue DAGCombiner::visitMULHU(SDNode *N) {
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SDLoc DL(N);
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SDLoc DL(N);
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// fold (mulhu x, 0) -> 0
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// fold (mulhu x, 0) -> 0
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if (N1C && N1C->isNullValue())
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if (isNullConstant(N1))
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return N1;
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return N1;
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// fold (mulhu x, 1) -> 0
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// fold (mulhu x, 1) -> 0
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if (N1C && N1C->getAPIntValue() == 1)
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if (N1C && N1C->getAPIntValue() == 1)
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@ -2751,7 +2753,7 @@ SDValue DAGCombiner::visitANDLike(SDValue N0, SDValue N1,
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if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
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if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
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LL.getValueType().isInteger()) {
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LL.getValueType().isInteger()) {
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// fold (and (seteq X, 0), (seteq Y, 0)) -> (seteq (or X, Y), 0)
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// fold (and (seteq X, 0), (seteq Y, 0)) -> (seteq (or X, Y), 0)
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if (cast<ConstantSDNode>(LR)->isNullValue() && Op1 == ISD::SETEQ) {
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if (isNullConstant(LR) && Op1 == ISD::SETEQ) {
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SDValue ORNode = DAG.getNode(ISD::OR, SDLoc(N0),
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SDValue ORNode = DAG.getNode(ISD::OR, SDLoc(N0),
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LR.getValueType(), LL, RL);
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LR.getValueType(), LL, RL);
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AddToWorklist(ORNode.getNode());
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AddToWorklist(ORNode.getNode());
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@ -2775,10 +2777,10 @@ SDValue DAGCombiner::visitANDLike(SDValue N0, SDValue N1,
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// Simplify (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
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// Simplify (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
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if (LL == RL && isa<ConstantSDNode>(LR) && isa<ConstantSDNode>(RR) &&
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if (LL == RL && isa<ConstantSDNode>(LR) && isa<ConstantSDNode>(RR) &&
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Op0 == Op1 && LL.getValueType().isInteger() &&
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Op0 == Op1 && LL.getValueType().isInteger() &&
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Op0 == ISD::SETNE && ((cast<ConstantSDNode>(LR)->isNullValue() &&
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Op0 == ISD::SETNE && ((isNullConstant(LR) &&
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cast<ConstantSDNode>(RR)->isAllOnesValue()) ||
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cast<ConstantSDNode>(RR)->isAllOnesValue()) ||
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(cast<ConstantSDNode>(LR)->isAllOnesValue() &&
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(cast<ConstantSDNode>(LR)->isAllOnesValue() &&
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cast<ConstantSDNode>(RR)->isNullValue()))) {
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isNullConstant(RR)))) {
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SDLoc DL(N0);
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SDLoc DL(N0);
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SDValue ADDNode = DAG.getNode(ISD::ADD, DL, LL.getValueType(),
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SDValue ADDNode = DAG.getNode(ISD::ADD, DL, LL.getValueType(),
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LL, DAG.getConstant(1, DL,
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LL, DAG.getConstant(1, DL,
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@ -3433,8 +3435,7 @@ SDValue DAGCombiner::visitORLike(SDValue N0, SDValue N1, SDNode *LocReference) {
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LL.getValueType().isInteger()) {
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LL.getValueType().isInteger()) {
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// fold (or (setne X, 0), (setne Y, 0)) -> (setne (or X, Y), 0)
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// fold (or (setne X, 0), (setne Y, 0)) -> (setne (or X, Y), 0)
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// fold (or (setlt X, 0), (setlt Y, 0)) -> (setne (or X, Y), 0)
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// fold (or (setlt X, 0), (setlt Y, 0)) -> (setne (or X, Y), 0)
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if (cast<ConstantSDNode>(LR)->isNullValue() &&
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if (isNullConstant(LR) && (Op1 == ISD::SETNE || Op1 == ISD::SETLT)) {
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(Op1 == ISD::SETNE || Op1 == ISD::SETLT)) {
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SDValue ORNode = DAG.getNode(ISD::OR, SDLoc(LR),
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SDValue ORNode = DAG.getNode(ISD::OR, SDLoc(LR),
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LR.getValueType(), LL, RL);
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LR.getValueType(), LL, RL);
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AddToWorklist(ORNode.getNode());
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AddToWorklist(ORNode.getNode());
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@ -3603,7 +3604,7 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
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!isConstantIntBuildVectorOrConstantInt(N1))
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!isConstantIntBuildVectorOrConstantInt(N1))
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return DAG.getNode(ISD::OR, SDLoc(N), VT, N1, N0);
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return DAG.getNode(ISD::OR, SDLoc(N), VT, N1, N0);
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// fold (or x, 0) -> x
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// fold (or x, 0) -> x
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if (N1C && N1C->isNullValue())
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if (isNullConstant(N1))
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return N0;
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return N0;
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// fold (or x, -1) -> -1
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// fold (or x, -1) -> -1
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if (N1C && N1C->isAllOnesValue())
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if (N1C && N1C->isAllOnesValue())
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@ -3947,7 +3948,7 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
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!isConstantIntBuildVectorOrConstantInt(N1))
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!isConstantIntBuildVectorOrConstantInt(N1))
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return DAG.getNode(ISD::XOR, SDLoc(N), VT, N1, N0);
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return DAG.getNode(ISD::XOR, SDLoc(N), VT, N1, N0);
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// fold (xor x, 0) -> x
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// fold (xor x, 0) -> x
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if (N1C && N1C->isNullValue())
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if (isNullConstant(N1))
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return N0;
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return N0;
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// reassociate xor
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// reassociate xor
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if (SDValue RXOR = ReassociateOps(ISD::XOR, SDLoc(N), N0, N1))
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if (SDValue RXOR = ReassociateOps(ISD::XOR, SDLoc(N), N0, N1))
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@ -4234,7 +4235,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
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if (N0C && N1C)
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if (N0C && N1C)
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return DAG.FoldConstantArithmetic(ISD::SHL, SDLoc(N), VT, N0C, N1C);
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return DAG.FoldConstantArithmetic(ISD::SHL, SDLoc(N), VT, N0C, N1C);
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// fold (shl 0, x) -> 0
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// fold (shl 0, x) -> 0
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if (N0C && N0C->isNullValue())
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if (isNullConstant(N0))
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return N0;
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return N0;
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// fold (shl x, c >= size(x)) -> undef
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// fold (shl x, c >= size(x)) -> undef
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if (N1C && N1C->getZExtValue() >= OpSizeInBits)
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if (N1C && N1C->getZExtValue() >= OpSizeInBits)
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@ -4405,7 +4406,7 @@ SDValue DAGCombiner::visitSRA(SDNode *N) {
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if (N0C && N1C)
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if (N0C && N1C)
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return DAG.FoldConstantArithmetic(ISD::SRA, SDLoc(N), VT, N0C, N1C);
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return DAG.FoldConstantArithmetic(ISD::SRA, SDLoc(N), VT, N0C, N1C);
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// fold (sra 0, x) -> 0
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// fold (sra 0, x) -> 0
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if (N0C && N0C->isNullValue())
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if (isNullConstant(N0))
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return N0;
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return N0;
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// fold (sra -1, x) -> -1
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// fold (sra -1, x) -> -1
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if (N0C && N0C->isAllOnesValue())
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if (N0C && N0C->isAllOnesValue())
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@ -4554,7 +4555,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
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if (N0C && N1C)
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if (N0C && N1C)
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return DAG.FoldConstantArithmetic(ISD::SRL, SDLoc(N), VT, N0C, N1C);
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return DAG.FoldConstantArithmetic(ISD::SRL, SDLoc(N), VT, N0C, N1C);
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// fold (srl 0, x) -> 0
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// fold (srl 0, x) -> 0
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if (N0C && N0C->isNullValue())
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if (isNullConstant(N0))
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return N0;
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return N0;
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// fold (srl x, c >= size(x)) -> undef
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// fold (srl x, c >= size(x)) -> undef
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if (N1C && N1C->getZExtValue() >= OpSizeInBits)
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if (N1C && N1C->getZExtValue() >= OpSizeInBits)
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@ -4836,13 +4837,11 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) {
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// fold (select C, X, X) -> X
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// fold (select C, X, X) -> X
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if (N1 == N2)
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if (N1 == N2)
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return N1;
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return N1;
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// fold (select true, X, Y) -> X
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if (const ConstantSDNode *N0C = dyn_cast<const ConstantSDNode>(N0)) {
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ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
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// fold (select true, X, Y) -> X
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if (N0C && !N0C->isNullValue())
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// fold (select false, X, Y) -> Y
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return N1;
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return !N0C->isNullValue() ? N1 : N2;
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// fold (select false, X, Y) -> Y
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}
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if (N0C && N0C->isNullValue())
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return N2;
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// fold (select C, 1, X) -> (or C, X)
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// fold (select C, 1, X) -> (or C, X)
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ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
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ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
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if (VT == MVT::i1 && N1C && N1C->getAPIntValue() == 1)
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if (VT == MVT::i1 && N1C && N1C->getAPIntValue() == 1)
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@ -4863,7 +4862,7 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) {
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TLI.getBooleanContents(false, true) &&
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TLI.getBooleanContents(false, true) &&
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TLI.getBooleanContents(false, false) ==
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TLI.getBooleanContents(false, false) ==
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TargetLowering::ZeroOrOneBooleanContent)) &&
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TargetLowering::ZeroOrOneBooleanContent)) &&
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N1C && N2C && N1C->isNullValue() && N2C->getAPIntValue() == 1) {
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isNullConstant(N1) && N2C && N2C->isOne()) {
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SDValue XORNode;
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SDValue XORNode;
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if (VT == VT0) {
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if (VT == VT0) {
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SDLoc DL(N);
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SDLoc DL(N);
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@ -4879,7 +4878,7 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) {
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return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, XORNode);
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return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, XORNode);
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}
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}
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// fold (select C, 0, X) -> (and (not C), X)
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// fold (select C, 0, X) -> (and (not C), X)
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if (VT == VT0 && VT == MVT::i1 && N1C && N1C->isNullValue()) {
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if (VT == VT0 && VT == MVT::i1 && isNullConstant(N1)) {
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SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT);
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SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT);
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AddToWorklist(NOTNode.getNode());
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AddToWorklist(NOTNode.getNode());
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return DAG.getNode(ISD::AND, SDLoc(N), VT, NOTNode, N2);
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return DAG.getNode(ISD::AND, SDLoc(N), VT, NOTNode, N2);
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@ -4891,7 +4890,7 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) {
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return DAG.getNode(ISD::OR, SDLoc(N), VT, NOTNode, N1);
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return DAG.getNode(ISD::OR, SDLoc(N), VT, NOTNode, N1);
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}
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}
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// fold (select C, X, 0) -> (and C, X)
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// fold (select C, X, 0) -> (and C, X)
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if (VT == MVT::i1 && N2C && N2C->isNullValue())
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if (VT == MVT::i1 && isNullConstant(N2))
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return DAG.getNode(ISD::AND, SDLoc(N), VT, N0, N1);
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return DAG.getNode(ISD::AND, SDLoc(N), VT, N0, N1);
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// fold (select X, X, Y) -> (or X, Y)
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// fold (select X, X, Y) -> (or X, Y)
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// fold (select X, 1, Y) -> (or X, Y)
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// fold (select X, 1, Y) -> (or X, Y)
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@ -5998,11 +5997,9 @@ static bool isTruncateOf(SelectionDAG &DAG, SDValue N, SDValue &Op,
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SDValue Op1 = N->getOperand(1);
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SDValue Op1 = N->getOperand(1);
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assert(Op0.getValueType() == Op1.getValueType());
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assert(Op0.getValueType() == Op1.getValueType());
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ConstantSDNode *COp0 = dyn_cast<ConstantSDNode>(Op0);
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if (isNullConstant(Op0))
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ConstantSDNode *COp1 = dyn_cast<ConstantSDNode>(Op1);
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if (COp0 && COp0->isNullValue())
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Op = Op1;
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Op = Op1;
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else if (COp1 && COp1->isNullValue())
|
else if (isNullConstant(Op1))
|
||||||
Op = Op0;
|
Op = Op0;
|
||||||
else
|
else
|
||||||
return false;
|
return false;
|
||||||
|
@ -9126,8 +9123,7 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) {
|
||||||
}
|
}
|
||||||
|
|
||||||
// Don't create a indexed load / store with zero offset.
|
// Don't create a indexed load / store with zero offset.
|
||||||
if (isa<ConstantSDNode>(Offset) &&
|
if (isNullConstant(Offset))
|
||||||
cast<ConstantSDNode>(Offset)->isNullValue())
|
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
// Try turning it into a pre-indexed load / store except when:
|
// Try turning it into a pre-indexed load / store except when:
|
||||||
|
@ -9343,8 +9339,7 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) {
|
||||||
ISD::MemIndexedMode AM = ISD::UNINDEXED;
|
ISD::MemIndexedMode AM = ISD::UNINDEXED;
|
||||||
if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM, DAG)) {
|
if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM, DAG)) {
|
||||||
// Don't create a indexed load / store with zero offset.
|
// Don't create a indexed load / store with zero offset.
|
||||||
if (isa<ConstantSDNode>(Offset) &&
|
if (isNullConstant(Offset))
|
||||||
cast<ConstantSDNode>(Offset)->isNullValue())
|
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
// Try turning it into a post-indexed load / store except when
|
// Try turning it into a post-indexed load / store except when
|
||||||
|
@ -11878,8 +11873,7 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
|
||||||
if (Op.getOpcode() == ISD::UNDEF) continue;
|
if (Op.getOpcode() == ISD::UNDEF) continue;
|
||||||
|
|
||||||
// See if we can combine this build_vector into a blend with a zero vector.
|
// See if we can combine this build_vector into a blend with a zero vector.
|
||||||
if (!VecIn2.getNode() && ((Op.getOpcode() == ISD::Constant &&
|
if (!VecIn2.getNode() && (isNullConstant(Op) ||
|
||||||
cast<ConstantSDNode>(Op.getNode())->isNullValue()) ||
|
|
||||||
(Op.getOpcode() == ISD::ConstantFP &&
|
(Op.getOpcode() == ISD::ConstantFP &&
|
||||||
cast<ConstantFPSDNode>(Op.getNode())->getValueAPF().isZero()))) {
|
cast<ConstantFPSDNode>(Op.getNode())->getValueAPF().isZero()))) {
|
||||||
UsesZeroVector = true;
|
UsesZeroVector = true;
|
||||||
|
@ -12904,15 +12898,16 @@ SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) {
|
||||||
|
|
||||||
for (unsigned i = 0; i != NumElts; ++i) {
|
for (unsigned i = 0; i != NumElts; ++i) {
|
||||||
SDValue Elt = RHS.getOperand(i);
|
SDValue Elt = RHS.getOperand(i);
|
||||||
if (!isa<ConstantSDNode>(Elt))
|
if (const ConstantSDNode *EltC = dyn_cast<const ConstantSDNode>(Elt)) {
|
||||||
return SDValue();
|
if (EltC->isAllOnesValue())
|
||||||
|
Indices.push_back(i);
|
||||||
if (cast<ConstantSDNode>(Elt)->isAllOnesValue())
|
else if (EltC->isNullValue())
|
||||||
Indices.push_back(i);
|
Indices.push_back(NumElts+i);
|
||||||
else if (cast<ConstantSDNode>(Elt)->isNullValue())
|
else
|
||||||
Indices.push_back(NumElts+i);
|
return SDValue();
|
||||||
else
|
} else {
|
||||||
return SDValue();
|
return SDValue();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Let's see if the target supports this vector_shuffle.
|
// Let's see if the target supports this vector_shuffle.
|
||||||
|
@ -12961,9 +12956,7 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) {
|
||||||
// Can't fold divide by zero.
|
// Can't fold divide by zero.
|
||||||
if (N->getOpcode() == ISD::SDIV || N->getOpcode() == ISD::UDIV ||
|
if (N->getOpcode() == ISD::SDIV || N->getOpcode() == ISD::UDIV ||
|
||||||
N->getOpcode() == ISD::FDIV) {
|
N->getOpcode() == ISD::FDIV) {
|
||||||
if ((RHSOp.getOpcode() == ISD::Constant &&
|
if (isNullConstant(RHSOp) || (RHSOp.getOpcode() == ISD::ConstantFP &&
|
||||||
cast<ConstantSDNode>(RHSOp.getNode())->isNullValue()) ||
|
|
||||||
(RHSOp.getOpcode() == ISD::ConstantFP &&
|
|
||||||
cast<ConstantFPSDNode>(RHSOp.getNode())->getValueAPF().isZero()))
|
cast<ConstantFPSDNode>(RHSOp.getNode())->getValueAPF().isZero()))
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -13213,20 +13206,17 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
|
||||||
EVT VT = N2.getValueType();
|
EVT VT = N2.getValueType();
|
||||||
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
|
||||||
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
|
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
|
||||||
ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.getNode());
|
|
||||||
|
|
||||||
// Determine if the condition we're dealing with is constant
|
// Determine if the condition we're dealing with is constant
|
||||||
SDValue SCC = SimplifySetCC(getSetCCResultType(N0.getValueType()),
|
SDValue SCC = SimplifySetCC(getSetCCResultType(N0.getValueType()),
|
||||||
N0, N1, CC, DL, false);
|
N0, N1, CC, DL, false);
|
||||||
if (SCC.getNode()) AddToWorklist(SCC.getNode());
|
if (SCC.getNode()) AddToWorklist(SCC.getNode());
|
||||||
ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(SCC.getNode());
|
|
||||||
|
|
||||||
// fold select_cc true, x, y -> x
|
if (ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(SCC.getNode())) {
|
||||||
if (SCCC && !SCCC->isNullValue())
|
// fold select_cc true, x, y -> x
|
||||||
return N2;
|
// fold select_cc false, x, y -> y
|
||||||
// fold select_cc false, x, y -> y
|
return !SCCC->isNullValue() ? N2 : N3;
|
||||||
if (SCCC && SCCC->isNullValue())
|
}
|
||||||
return N3;
|
|
||||||
|
|
||||||
// Check to see if we can simplify the select into an fabs node
|
// Check to see if we can simplify the select into an fabs node
|
||||||
if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) {
|
if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) {
|
||||||
|
@ -13301,7 +13291,7 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
|
||||||
|
|
||||||
// Check to see if we can perform the "gzip trick", transforming
|
// Check to see if we can perform the "gzip trick", transforming
|
||||||
// (select_cc setlt X, 0, A, 0) -> (and (sra X, (sub size(X), 1), A)
|
// (select_cc setlt X, 0, A, 0) -> (and (sra X, (sub size(X), 1), A)
|
||||||
if (N1C && N3C && N3C->isNullValue() && CC == ISD::SETLT &&
|
if (N1C && isNullConstant(N3) && CC == ISD::SETLT &&
|
||||||
(N1C->isNullValue() || // (a < 0) ? b : 0
|
(N1C->isNullValue() || // (a < 0) ? b : 0
|
||||||
(N1C->getAPIntValue() == 1 && N0 == N2))) { // (a < 1) ? a : 0
|
(N1C->getAPIntValue() == 1 && N0 == N2))) { // (a < 1) ? a : 0
|
||||||
EVT XType = N0.getValueType();
|
EVT XType = N0.getValueType();
|
||||||
|
@ -13349,9 +13339,7 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
|
||||||
// single bit-test can be materialized as an all-ones register with
|
// single bit-test can be materialized as an all-ones register with
|
||||||
// shift-left and shift-right-arith.
|
// shift-left and shift-right-arith.
|
||||||
if (CC == ISD::SETEQ && N0->getOpcode() == ISD::AND &&
|
if (CC == ISD::SETEQ && N0->getOpcode() == ISD::AND &&
|
||||||
N0->getValueType(0) == VT &&
|
N0->getValueType(0) == VT && isNullConstant(N1) && isNullConstant(N2)) {
|
||||||
N1C && N1C->isNullValue() &&
|
|
||||||
N2C && N2C->isNullValue()) {
|
|
||||||
SDValue AndLHS = N0->getOperand(0);
|
SDValue AndLHS = N0->getOperand(0);
|
||||||
ConstantSDNode *ConstAndRHS = dyn_cast<ConstantSDNode>(N0->getOperand(1));
|
ConstantSDNode *ConstAndRHS = dyn_cast<ConstantSDNode>(N0->getOperand(1));
|
||||||
if (ConstAndRHS && ConstAndRHS->getAPIntValue().countPopulation() == 1) {
|
if (ConstAndRHS && ConstAndRHS->getAPIntValue().countPopulation() == 1) {
|
||||||
|
@ -13374,7 +13362,7 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
|
||||||
}
|
}
|
||||||
|
|
||||||
// fold select C, 16, 0 -> shl C, 4
|
// fold select C, 16, 0 -> shl C, 4
|
||||||
if (N2C && N3C && N3C->isNullValue() && N2C->getAPIntValue().isPowerOf2() &&
|
if (N2C && isNullConstant(N3) && N2C->getAPIntValue().isPowerOf2() &&
|
||||||
TLI.getBooleanContents(N0.getValueType()) ==
|
TLI.getBooleanContents(N0.getValueType()) ==
|
||||||
TargetLowering::ZeroOrOneBooleanContent) {
|
TargetLowering::ZeroOrOneBooleanContent) {
|
||||||
|
|
||||||
|
@ -13422,7 +13410,7 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
|
||||||
// Check to see if this is the equivalent of setcc
|
// Check to see if this is the equivalent of setcc
|
||||||
// FIXME: Turn all of these into setcc if setcc if setcc is legal
|
// FIXME: Turn all of these into setcc if setcc if setcc is legal
|
||||||
// otherwise, go ahead with the folds.
|
// otherwise, go ahead with the folds.
|
||||||
if (0 && N3C && N3C->isNullValue() && N2C && (N2C->getAPIntValue() == 1ULL)) {
|
if (0 && isNullConstant(N3) && N2C && (N2C->getAPIntValue() == 1ULL)) {
|
||||||
EVT XType = N0.getValueType();
|
EVT XType = N0.getValueType();
|
||||||
if (!LegalOperations ||
|
if (!LegalOperations ||
|
||||||
TLI.isOperationLegal(ISD::SETCC, getSetCCResultType(XType))) {
|
TLI.isOperationLegal(ISD::SETCC, getSetCCResultType(XType))) {
|
||||||
|
@ -13433,7 +13421,7 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
|
||||||
}
|
}
|
||||||
|
|
||||||
// fold (seteq X, 0) -> (srl (ctlz X, log2(size(X))))
|
// fold (seteq X, 0) -> (srl (ctlz X, log2(size(X))))
|
||||||
if (N1C && N1C->isNullValue() && CC == ISD::SETEQ &&
|
if (isNullConstant(N1) && CC == ISD::SETEQ &&
|
||||||
(!LegalOperations ||
|
(!LegalOperations ||
|
||||||
TLI.isOperationLegal(ISD::CTLZ, XType))) {
|
TLI.isOperationLegal(ISD::CTLZ, XType))) {
|
||||||
SDValue Ctlz = DAG.getNode(ISD::CTLZ, SDLoc(N0), XType, N0);
|
SDValue Ctlz = DAG.getNode(ISD::CTLZ, SDLoc(N0), XType, N0);
|
||||||
|
@ -13443,7 +13431,7 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
|
||||||
getShiftAmountTy(Ctlz.getValueType())));
|
getShiftAmountTy(Ctlz.getValueType())));
|
||||||
}
|
}
|
||||||
// fold (setgt X, 0) -> (srl (and (-X, ~X), size(X)-1))
|
// fold (setgt X, 0) -> (srl (and (-X, ~X), size(X)-1))
|
||||||
if (N1C && N1C->isNullValue() && CC == ISD::SETGT) {
|
if (isNullConstant(N1) && CC == ISD::SETGT) {
|
||||||
SDLoc DL(N0);
|
SDLoc DL(N0);
|
||||||
SDValue NegN0 = DAG.getNode(ISD::SUB, DL,
|
SDValue NegN0 = DAG.getNode(ISD::SUB, DL,
|
||||||
XType, DAG.getConstant(0, DL, XType), N0);
|
XType, DAG.getConstant(0, DL, XType), N0);
|
||||||
|
@ -13518,7 +13506,7 @@ SDValue DAGCombiner::BuildSDIV(SDNode *N) {
|
||||||
return SDValue();
|
return SDValue();
|
||||||
|
|
||||||
// Avoid division by zero.
|
// Avoid division by zero.
|
||||||
if (!C->getAPIntValue())
|
if (C->isNullValue())
|
||||||
return SDValue();
|
return SDValue();
|
||||||
|
|
||||||
std::vector<SDNode*> Built;
|
std::vector<SDNode*> Built;
|
||||||
|
@ -13538,7 +13526,7 @@ SDValue DAGCombiner::BuildSDIVPow2(SDNode *N) {
|
||||||
return SDValue();
|
return SDValue();
|
||||||
|
|
||||||
// Avoid division by zero.
|
// Avoid division by zero.
|
||||||
if (!C->getAPIntValue())
|
if (C->isNullValue())
|
||||||
return SDValue();
|
return SDValue();
|
||||||
|
|
||||||
std::vector<SDNode *> Built;
|
std::vector<SDNode *> Built;
|
||||||
|
@ -13559,7 +13547,7 @@ SDValue DAGCombiner::BuildUDIV(SDNode *N) {
|
||||||
return SDValue();
|
return SDValue();
|
||||||
|
|
||||||
// Avoid division by zero.
|
// Avoid division by zero.
|
||||||
if (!C->getAPIntValue())
|
if (C->isNullValue())
|
||||||
return SDValue();
|
return SDValue();
|
||||||
|
|
||||||
std::vector<SDNode*> Built;
|
std::vector<SDNode*> Built;
|
||||||
|
|
Loading…
Reference in New Issue