forked from OSchip/llvm-project
Fix PR34021 test on non-x86 build targets
llvm-svn: 313034
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1a33da2401
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14fd10e528
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@ -5,20 +5,20 @@
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typedef int v4si __attribute__ ((vector_size (16)));
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v4si rep() {
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// X86-LABEL: define <4 x i32> @rep
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// X86: %retval = alloca <4 x i32>, align 16
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// X86-NEXT: %res = alloca <4 x i32>, align 16
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// X86-NEXT: %0 = bitcast <4 x i32>* %retval to i128*
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// X86-NEXT: %1 = call i64 asm sideeffect inteldialect "", "=A,~{dirflag},~{fpsr},~{flags}"()
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// X86-NEXT: %2 = zext i64 %1 to i128
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// X86-NEXT: store i128 %2, i128* %0, align 16
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// X86-NEXT: %3 = load <4 x i32>, <4 x i32>* %res, align 16
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// X86-NEXT: ret <4 x i32> %3
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// X86: %[[ALLOCA0:.*]] = alloca <4 x i32>, align 16
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// X86: %[[ALLOCA1:.*]] = alloca <4 x i32>, align 16
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// X86: %[[BITCAST:.*]] = bitcast <4 x i32>* %[[ALLOCA0]] to i128*
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// X86: %[[ASM:.*]] = call i64 asm sideeffect inteldialect "", "=A,~{dirflag},~{fpsr},~{flags}"()
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// X86: %[[ZEXT:.*]] = zext i64 %[[ASM]] to i128
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// X86: store i128 %[[ZEXT]], i128* %[[BITCAST]], align 16
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// X86: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA1]], align 16
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// X86: ret <4 x i32> %[[LOAD]]
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//
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// X64-LABEL: define <4 x i32> @rep
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// X64: %res = alloca <4 x i32>, align 16
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// X64-NEXT: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"()
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// X64-NEXT: %0 = load <4 x i32>, <4 x i32>* %res, align 16
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// X64-NEXT: ret <4 x i32> %0
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// X64: %[[ALLOCA:.*]] = alloca <4 x i32>, align 16
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// X64: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"()
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// X64: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA]], align 16
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// X64: ret <4 x i32> %[[LOAD]]
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v4si res;
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__asm {}
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return res;
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