forked from OSchip/llvm-project
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores.
Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
This commit is contained in:
Chad Rosier
parent
63799512b2
commit
14fc82a1df
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@ -388,6 +388,10 @@ static unsigned isMatchingStore(MachineInstr &LoadInst,
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}
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static unsigned getPreIndexedOpcode(unsigned Opc) {
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// FIXME: We don't currently support creating pre-indexed loads/stores when
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// the load or store is the unscaled version. If we decide to perform such an
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// optimization in the future the cases for the unscaled loads/stores will
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// need to be added here.
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switch (Opc) {
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default:
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llvm_unreachable("Opcode has no pre-indexed equivalent!");
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@ -451,32 +455,42 @@ static unsigned getPostIndexedOpcode(unsigned Opc) {
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default:
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llvm_unreachable("Opcode has no post-indexed wise equivalent!");
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case AArch64::STRSui:
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case AArch64::STURSi:
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return AArch64::STRSpost;
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case AArch64::STRDui:
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case AArch64::STURDi:
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return AArch64::STRDpost;
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case AArch64::STRQui:
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case AArch64::STURQi:
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return AArch64::STRQpost;
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case AArch64::STRBBui:
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return AArch64::STRBBpost;
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case AArch64::STRHHui:
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return AArch64::STRHHpost;
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case AArch64::STRWui:
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case AArch64::STURWi:
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return AArch64::STRWpost;
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case AArch64::STRXui:
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case AArch64::STURXi:
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return AArch64::STRXpost;
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case AArch64::LDRSui:
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case AArch64::LDURSi:
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return AArch64::LDRSpost;
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case AArch64::LDRDui:
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case AArch64::LDURDi:
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return AArch64::LDRDpost;
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case AArch64::LDRQui:
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case AArch64::LDURQi:
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return AArch64::LDRQpost;
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case AArch64::LDRBBui:
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return AArch64::LDRBBpost;
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case AArch64::LDRHHui:
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return AArch64::LDRHHpost;
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case AArch64::LDRWui:
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case AArch64::LDURWi:
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return AArch64::LDRWpost;
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case AArch64::LDRXui:
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case AArch64::LDURXi:
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return AArch64::LDRXpost;
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case AArch64::LDRSWui:
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return AArch64::LDRSWpost;
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@ -1694,8 +1708,9 @@ bool AArch64LoadStoreOpt::optimizeBlock(MachineBasicBlock &MBB,
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++NumPostFolded;
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break;
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}
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// Don't know how to handle pre/post-index versions, so move to the next
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// instruction.
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// Don't know how to handle unscaled pre/post-index versions below, so
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// move to the next instruction.
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if (TII->isUnscaledLdSt(Opc)) {
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++MBBI;
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break;
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@ -0,0 +1,115 @@
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# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt -verify-machineinstrs -o - %s | FileCheck %s
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---
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# CHECK-LABEL: name: test_LDURSi_post
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# CHECK: LDRSpost %x0, -4
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name: test_LDURSi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%s0 = LDURSi %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_LDURDi_post
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# CHECK: LDRDpost %x0, -4
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name: test_LDURDi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%d0 = LDURDi %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_LDURQi_post
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# CHECK: LDRQpost %x0, -4
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name: test_LDURQi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%q0 = LDURQi %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_LDURWi_post
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# CHECK: LDRWpost %x0, -4
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name: test_LDURWi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%w1 = LDURWi %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_LDURXi_post
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# CHECK: %x1 = LDRXpost %x0, -4
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name: test_LDURXi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%x1 = LDURXi %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_STURSi_post
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# CHECK: STRSpost %s0, %x0, -4
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name: test_STURSi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%s0 = FMOVS0
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STURSi %s0, %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_STURDi_post
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# CHECK: STRDpost %d0, %x0, -4
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name: test_STURDi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%d0 = FMOVD0
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STURDi %d0, %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_STURQi_post
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# CHECK: STRQpost %q0, %x0, -4
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name: test_STURQi_post
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body: |
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bb.0.entry:
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liveins: %x0
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%q0 = MOVIv4i32 0, 0
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STURQi %q0, %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_STURWi_post
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# CHECK: STRWpost %wzr, %x0, -4
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name: test_STURWi_post
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body: |
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bb.0.entry:
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liveins: %x0
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STURWi %wzr, %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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# CHECK-LABEL: name: test_STURXi_post
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# CHECK: STRXpost %xzr, %x0, -4
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name: test_STURXi_post
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body: |
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bb.0.entry:
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liveins: %x0
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STURXi %xzr, %x0, 0
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%x0 = SUBXri %x0, 4, 0
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RET_ReallyLR implicit %x0
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...
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